crafterpika/MeloNX
0
0
Fork 0
mirror of https://git.743378673.xyz/MeloNX/MeloNX.git synced 2025-08-03 06:27:10 +02:00
Code Issues Projects Releases Packages Wiki Activity

CPU refactoring - move SIMD (scalar and vector) instructions to separate files by category, remove AILConv and use only the methods inside SIMD helper to extract/insert vector elements

Browse source
This commit is contained in:
gdkchan 2018-02-17 18:06:11 -03:00
parent b3e47b5712
commit 161193e113
24 changed files with 2551 additions and 2610 deletions
Download patch file Download diff file Expand all files Collapse all files

113
Ryujinx/Cpu/Translation/AILConv.cs
View file

@ -1,113 +0,0 @@
using ChocolArm64.State;
using System;
using System.Reflection;
using System.Reflection.Emit;
namespace ChocolArm64.Translation
{
static class AILConv
{
public static void EmitConv(AILEmitter Context, Type SrcType, Type TgtType)
{
if (SrcType == TgtType)
{
//If both types are equal we don't need to cast anything.
return;
}
if (SrcType.IsPrimitive)
{
if (TgtType == typeof(byte))
{
Context.Generator.Emit(OpCodes.Conv_U1);
}
else if (TgtType == typeof(ushort))
{
Context.Generator.Emit(OpCodes.Conv_U2);
}
else if (TgtType == typeof(uint))
{
Context.Generator.Emit(OpCodes.Conv_U4);
}
else if (TgtType == typeof(ulong))
{
Context.Generator.Emit(OpCodes.Conv_U8);
}
else if (TgtType == typeof(float))
{
Context.Generator.Emit(OpCodes.Conv_R4);
}
else if (TgtType == typeof(double))
{
Context.Generator.Emit(OpCodes.Conv_R8);
}
else if (TgtType == typeof(AVec))
{
EmitMakeVec(Context, SrcType);
}
else
{
throw new ArgumentException(nameof(TgtType));
}
}
else if (SrcType == typeof(AVec))
{
if (TgtType == typeof(float))
{
EmitScalarLdfld(Context, nameof(AVec.S0));
}
else if (TgtType == typeof(double))
{
EmitScalarLdfld(Context, nameof(AVec.D0));
}
else if (TgtType == typeof(byte))
{
EmitScalarLdfld(Context, nameof(AVec.B0));
}
else if (TgtType == typeof(ushort))
{
EmitScalarLdfld(Context, nameof(AVec.H0));
}
else if (TgtType == typeof(uint))
{
EmitScalarLdfld(Context, nameof(AVec.W0));
}
else if (TgtType == typeof(ulong))
{
EmitScalarLdfld(Context, nameof(AVec.X0));
}
else
{
throw new ArgumentException(nameof(TgtType));
}
}
else
{
throw new ArgumentException(nameof(SrcType));
}
}
private static void EmitScalarLdfld(AILEmitter Context,string FldName)
{
Context.Generator.Emit(OpCodes.Ldfld, typeof(AVec).GetField(FldName));
}
private static void EmitMakeVec(AILEmitter Context, Type SrcType)
{
string MthdName = nameof(MakeScalar);
Type[] MthdTypes = new Type[] { SrcType };
MethodInfo MthdInfo = typeof(AILConv).GetMethod(MthdName, MthdTypes);
Context.Generator.Emit(OpCodes.Call, MthdInfo);
}
public static AVec MakeScalar(byte Value) => new AVec { B0 = Value };
public static AVec MakeScalar(ushort Value) => new AVec { H0 = Value };
public static AVec MakeScalar(uint Value) => new AVec { W0 = Value };
public static AVec MakeScalar(float Value) => new AVec { S0 = Value };
public static AVec MakeScalar(ulong Value) => new AVec { X0 = Value };
public static AVec MakeScalar(double Value) => new AVec { D0 = Value };
}
}

3
Ryujinx/Cpu/Translation/AILEmitter.cs
View file

@ -86,9 +86,6 @@ namespace ChocolArm64.Translation
ARegister Reg = Subroutine.Params[Index];
Generator.EmitLdarg(Index + ParamsStart);
AILConv.EmitConv(this, GetFieldType(Reg.Type), GetLocalType(Reg));
Generator.EmitStloc(GetLocalIndex(Reg));
}
}

108
Ryujinx/Cpu/Translation/AILEmitterCtx.cs
View file

@ -150,8 +150,8 @@ namespace ChocolArm64.Translation
if (LastCmpOp != null && LastFlagOp == LastCmpOp && BranchOps.ContainsKey(Cond))
{
Ldloc(Tmp3Index, AIoType.Int, GetIntType(LastCmpOp));
Ldloc(Tmp4Index, AIoType.Int, GetIntType(LastCmpOp));
Ldloc(Tmp3Index, AIoType.Int, LastCmpOp.RegisterSize);
Ldloc(Tmp4Index, AIoType.Int, LastCmpOp.RegisterSize);
if (LastCmpOp.Emitter == AInstEmit.Adds)
{
@ -353,12 +353,6 @@ namespace ChocolArm64.Translation
public void EmitLdvec(int Index) => Ldloc(Index, AIoType.Vector);
public void EmitStvec(int Index) => Stloc(Index, AIoType.Vector);
public void EmitLdvecsi(int Index) => Ldloc(Index, AIoType.VectorI);
public void EmitStvecsi(int Index) => Stloc(Index, AIoType.VectorI);
public void EmitLdvecsf(int Index) => Ldloc(Index, AIoType.VectorF);
public void EmitStvecsf(int Index) => Stloc(Index, AIoType.VectorF);
public void EmitLdflg(int Index) => Ldloc(Index, AIoType.Flag);
public void EmitStflg(int Index)
{
@ -369,107 +363,17 @@ namespace ChocolArm64.Translation
private void Ldloc(int Index, AIoType IoType)
{
ILBlock.Add(new AILOpCodeLoad(Index, IoType, GetOperType(IoType)));
ILBlock.Add(new AILOpCodeLoad(Index, IoType, CurrOp.RegisterSize));
}
private void Ldloc(int Index, AIoType IoType, Type Type)
private void Ldloc(int Index, AIoType IoType, ARegisterSize RegisterSize)
{
ILBlock.Add(new AILOpCodeLoad(Index, IoType, Type));
ILBlock.Add(new AILOpCodeLoad(Index, IoType, RegisterSize));
}
private void Stloc(int Index, AIoType IoType)
{
ILBlock.Add(new AILOpCodeStore(Index, IoType, GetOutOperType(IoType)));
}
private Type GetOutOperType(AIoType IoType)
{
//This instruction is used to convert between floating point
//types, so the input and output types are different.
if (CurrOp.Emitter == AInstEmit.Fcvt_S)
{
return GetFloatType(((AOpCodeSimd)CurrOp).Opc);
}
else
{
return GetOperType(IoType);
}
}
private Type GetOperType(AIoType IoType)
{
switch (IoType & AIoType.Mask)
{
case AIoType.Flag: return typeof(bool);
case AIoType.Int: return GetIntType(CurrOp);
case AIoType.Vector: return GetVecType(CurrOp, IoType);
}
throw new ArgumentException(nameof(IoType));
}
private Type GetIntType(AOpCode OpCode)
{
//Always default to 64-bits.
return OpCode.RegisterSize == ARegisterSize.Int32
? typeof(uint)
: typeof(ulong);
}
private Type GetVecType(AOpCode OpCode, AIoType IoType)
{
if (!(OpCode is IAOpCodeSimd Op))
{
return typeof(AVec);
}
int Size = Op.Size;
if (Op.Emitter == AInstEmit.Fmov_Ftoi ||
Op.Emitter == AInstEmit.Fmov_Itof)
{
Size |= 2;
}
if ((Op is AOpCodeMem || Op is IAOpCodeLit) &&
!(Op is AOpCodeSimdMemMs || Op is AOpCodeSimdMemSs))
{
return Size < 4 ? typeof(ulong) : typeof(AVec);
}
else if (IoType == AIoType.VectorI)
{
return GetIntType(Size);
}
else if (IoType == AIoType.VectorF)
{
return GetFloatType(Size);
}
return typeof(AVec);
}
private static Type GetIntType(int Size)
{
switch (Size)
{
case 0: return typeof(byte);
case 1: return typeof(ushort);
case 2: return typeof(uint);
case 3: return typeof(ulong);
}
throw new ArgumentOutOfRangeException(nameof(Size));
}
private static Type GetFloatType(int Size)
{
switch (Size)
{
case 0: return typeof(float);
case 1: return typeof(double);
}
throw new ArgumentOutOfRangeException(nameof(Size));
ILBlock.Add(new AILOpCodeStore(Index, IoType, CurrOp.RegisterSize));
}
public void EmitCallPropGet(Type ObjType, string PropName)

57
Ryujinx/Cpu/Translation/AILOpCodeLoad.cs
View file

@ -1,5 +1,4 @@
using ChocolArm64.State;
using System;
using System.Reflection.Emit;
namespace ChocolArm64.Translation
@ -10,43 +9,40 @@ namespace ChocolArm64.Translation
public AIoType IoType { get; private set; }
public Type OperType { get; private set; }
public ARegisterSize RegisterSize { get; private set; }
public AILOpCodeLoad(int Index, AIoType IoType) : this(Index, IoType, null) { }
public AILOpCodeLoad(int Index, AIoType IoType) : this(Index, IoType, ARegisterSize.Int64) { }
public AILOpCodeLoad(int Index, AIoType IoType, Type OperType)
public AILOpCodeLoad(int Index, AIoType IoType, ARegisterSize RegisterSize)
{
this.IoType = IoType;
this.Index = Index;
this.OperType = OperType;
this.IoType = IoType;
this.Index = Index;
this.RegisterSize = RegisterSize;
}
public void Emit(AILEmitter Context)
{
switch (IoType & AIoType.Mask)
{
case AIoType.Arg: EmitLdarg(Context, Index); break;
case AIoType.Fields: EmitLdfld(Context, Index); break;
case AIoType.Arg: Context.Generator.EmitLdarg(Index); break;
case AIoType.Fields:
{
long IntInputs = Context.LocalAlloc.GetIntInputs(Context.GetILBlock(Index));
long VecInputs = Context.LocalAlloc.GetVecInputs(Context.GetILBlock(Index));
LoadLocals(Context, IntInputs, ARegisterType.Int);
LoadLocals(Context, VecInputs, ARegisterType.Vector);
break;
}
case AIoType.Flag: EmitLdloc(Context, Index, ARegisterType.Flag); break;
case AIoType.Int: EmitLdloc(Context, Index, ARegisterType.Int); break;
case AIoType.Vector: EmitLdloc(Context, Index, ARegisterType.Vector); break;
}
}
private void EmitLdarg(AILEmitter Context, int Index)
{
Context.Generator.EmitLdarg(Index);
}
private void EmitLdfld(AILEmitter Context, int Index)
{
long IntInputs = Context.LocalAlloc.GetIntInputs(Context.GetILBlock(Index));
long VecInputs = Context.LocalAlloc.GetVecInputs(Context.GetILBlock(Index));
LoadLocals(Context, IntInputs, ARegisterType.Int);
LoadLocals(Context, VecInputs, ARegisterType.Vector);
}
private void LoadLocals(AILEmitter Context, long Inputs, ARegisterType BaseType)
{
for (int Bit = 0; Bit < 64; Bit++)
@ -60,23 +56,22 @@ namespace ChocolArm64.Translation
Context.Generator.EmitLdarg(ATranslatedSub.RegistersArgIdx);
Context.Generator.Emit(OpCodes.Ldfld, Reg.GetField());
AILConv.EmitConv(
Context,
Context.GetFieldType(Reg.Type),
Context.GetLocalType(Reg));
Context.Generator.EmitStloc(Context.GetLocalIndex(Reg));
}
}
}
private void EmitLdloc(AILEmitter Context, int Index, ARegisterType Type)
private void EmitLdloc(AILEmitter Context, int Index, ARegisterType RegisterType)
{
ARegister Reg = new ARegister(Index, Type);
ARegister Reg = new ARegister(Index, RegisterType);
Context.Generator.EmitLdloc(Context.GetLocalIndex(Reg));
AILConv.EmitConv(Context, Context.GetLocalType(Reg), OperType);
if (RegisterType == ARegisterType.Int &&
RegisterSize == ARegisterSize.Int32)
{
Context.Generator.Emit(OpCodes.Conv_U4);
}
}
}
}

63
Ryujinx/Cpu/Translation/AILOpCodeStore.cs
View file

@ -1,52 +1,48 @@
using ChocolArm64.State;
using System;
using System.Reflection.Emit;
namespace ChocolArm64.Translation
{
struct AILOpCodeStore : IAILEmit
{
public AIoType IoType { get; private set; }
public Type OperType { get; private set; }
public int Index { get; private set; }
public AILOpCodeStore(int Index, AIoType IoType) : this(Index, IoType, null) { }
public AIoType IoType { get; private set; }
public AILOpCodeStore(int Index, AIoType IoType, Type OperType)
public ARegisterSize RegisterSize { get; private set; }
public AILOpCodeStore(int Index, AIoType IoType) : this(Index, IoType, ARegisterSize.Int64) { }
public AILOpCodeStore(int Index, AIoType IoType, ARegisterSize RegisterSize)
{
this.IoType = IoType;
this.Index = Index;
this.OperType = OperType;
this.IoType = IoType;
this.Index = Index;
this.RegisterSize = RegisterSize;
}
public void Emit(AILEmitter Context)
{
switch (IoType & AIoType.Mask)
{
case AIoType.Arg: EmitStarg(Context, Index); break;
case AIoType.Fields: EmitStfld(Context, Index); break;
case AIoType.Arg: Context.Generator.EmitStarg(Index); break;
case AIoType.Fields:
{
long IntOutputs = Context.LocalAlloc.GetIntOutputs(Context.GetILBlock(Index));
long VecOutputs = Context.LocalAlloc.GetVecOutputs(Context.GetILBlock(Index));
StoreLocals(Context, IntOutputs, ARegisterType.Int);
StoreLocals(Context, VecOutputs, ARegisterType.Vector);
break;
}
case AIoType.Flag: EmitStloc(Context, Index, ARegisterType.Flag); break;
case AIoType.Int: EmitStloc(Context, Index, ARegisterType.Int); break;
case AIoType.Vector: EmitStloc(Context, Index, ARegisterType.Vector); break;
}
}
private void EmitStarg(AILEmitter Context, int Index)
{
Context.Generator.EmitStarg(Index);
}
private void EmitStfld(AILEmitter Context, int Index)
{
long IntOutputs = Context.LocalAlloc.GetIntOutputs(Context.GetILBlock(Index));
long VecOutputs = Context.LocalAlloc.GetVecOutputs(Context.GetILBlock(Index));
StoreLocals(Context, IntOutputs, ARegisterType.Int);
StoreLocals(Context, VecOutputs, ARegisterType.Vector);
}
private void StoreLocals(AILEmitter Context, long Outputs, ARegisterType BaseType)
{
for (int Bit = 0; Bit < 64; Bit++)
@ -60,21 +56,20 @@ namespace ChocolArm64.Translation
Context.Generator.EmitLdarg(ATranslatedSub.RegistersArgIdx);
Context.Generator.EmitLdloc(Context.GetLocalIndex(Reg));
AILConv.EmitConv(
Context,
Context.GetLocalType(Reg),
Context.GetFieldType(Reg.Type));
Context.Generator.Emit(OpCodes.Stfld, Reg.GetField());
}
}
}
private void EmitStloc(AILEmitter Context, int Index, ARegisterType Type)
private void EmitStloc(AILEmitter Context, int Index, ARegisterType RegisterType)
{
ARegister Reg = new ARegister(Index, Type);
ARegister Reg = new ARegister(Index, RegisterType);
AILConv.EmitConv(Context, OperType, Context.GetLocalType(Reg));
if (RegisterType == ARegisterType.Int &&
RegisterSize == ARegisterSize.Int32)
{
Context.Generator.Emit(OpCodes.Conv_U8);
}
Context.Generator.EmitStloc(Context.GetLocalIndex(Reg));
}