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[Ryujinx.Graphics.Nvdec.Vp9] Address dotnet-format issues (#5371)
* dotnet format style --severity info Some changes were manually reverted. * dotnet format analyzers --serverity info Some changes have been minimally adapted. * Restore a few unused methods and variables * Silence dotnet format IDE0060 warnings * Address or silence dotnet format IDE1006 warnings * Address most dotnet format whitespace warnings * Apply dotnet format whitespace formatting A few of them have been manually reverted and the corresponding warning was silenced * Add comments to disabled warnings * Simplify properties and array initialization, Use const when possible, Remove trailing commas * Address IDE0251 warnings * Address a few disabled IDE0060 warnings * Silence IDE0060 in .editorconfig * Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas" This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e. * dotnet format whitespace after rebase * Fix empty lines before return Co-authored-by: Ac_K <Acoustik666@gmail.com> * Add trailing commas, remove redundant code and remove static modifier from Surface.HighBd * Fix naming rule violations * Fix naming rule violations * Fix empty line before return * Fix comment style Co-authored-by: Ac_K <Acoustik666@gmail.com> * Remove comment alignment * Address review feedback * Separate comments by 2 spaces and fix other formatting issues * Make HighBd an auto-property * Replace if-chain with if-else-chain * Fix new naming rule violations --------- Co-authored-by: Ac_K <Acoustik666@gmail.com>
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41 changed files with 1240 additions and 1207 deletions
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@ -30,12 +30,11 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
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// 10101010
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//
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// A loopfilter should be applied to every other 8x8 horizontally.
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private static readonly ulong[] Left64X64TxformMask = new ulong[]
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{
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0xffffffffffffffffUL, // TX_4X4
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0xffffffffffffffffUL, // TX_8x8
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0x5555555555555555UL, // TX_16x16
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0x1111111111111111UL, // TX_32x32
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private static readonly ulong[] _left64X64TxformMask = {
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0xffffffffffffffffUL, // TX_4X4
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0xffffffffffffffffUL, // TX_8x8
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0x5555555555555555UL, // TX_16x16
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0x1111111111111111UL, // TX_32x32
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};
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// 64 bit masks for above transform size. Each 1 represents a position where
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@ -55,12 +54,11 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
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// 00000000
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//
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// A loopfilter should be applied to every other 4 the row vertically.
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private static readonly ulong[] Above64X64TxformMask = new ulong[]
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{
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0xffffffffffffffffUL, // TX_4X4
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0xffffffffffffffffUL, // TX_8x8
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0x00ff00ff00ff00ffUL, // TX_16x16
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0x000000ff000000ffUL, // TX_32x32
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private static readonly ulong[] _above64X64TxformMask = {
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0xffffffffffffffffUL, // TX_4X4
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0xffffffffffffffffUL, // TX_8x8
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0x00ff00ff00ff00ffUL, // TX_16x16
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0x000000ff000000ffUL, // TX_32x32
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};
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// 64 bit masks for prediction sizes (left). Each 1 represents a position
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@ -78,148 +76,143 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
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// 00000000
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// 00000000
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// 00000000
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private static readonly ulong[] LeftPredictionMask = new ulong[]
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{
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0x0000000000000001UL, // BLOCK_4X4,
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0x0000000000000001UL, // BLOCK_4X8,
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0x0000000000000001UL, // BLOCK_8X4,
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0x0000000000000001UL, // BLOCK_8X8,
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0x0000000000000101UL, // BLOCK_8X16,
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0x0000000000000001UL, // BLOCK_16X8,
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0x0000000000000101UL, // BLOCK_16X16,
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0x0000000001010101UL, // BLOCK_16X32,
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0x0000000000000101UL, // BLOCK_32X16,
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0x0000000001010101UL, // BLOCK_32X32,
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0x0101010101010101UL, // BLOCK_32X64,
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0x0000000001010101UL, // BLOCK_64X32,
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0x0101010101010101UL, // BLOCK_64X64
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private static readonly ulong[] _leftPredictionMask = {
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0x0000000000000001UL, // BLOCK_4X4,
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0x0000000000000001UL, // BLOCK_4X8,
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0x0000000000000001UL, // BLOCK_8X4,
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0x0000000000000001UL, // BLOCK_8X8,
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0x0000000000000101UL, // BLOCK_8X16,
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0x0000000000000001UL, // BLOCK_16X8,
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0x0000000000000101UL, // BLOCK_16X16,
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0x0000000001010101UL, // BLOCK_16X32,
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0x0000000000000101UL, // BLOCK_32X16,
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0x0000000001010101UL, // BLOCK_32X32,
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0x0101010101010101UL, // BLOCK_32X64,
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0x0000000001010101UL, // BLOCK_64X32,
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0x0101010101010101UL, // BLOCK_64X64
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};
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// 64 bit mask to shift and set for each prediction size.
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private static readonly ulong[] AbovePredictionMask = new ulong[]
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{
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0x0000000000000001UL, // BLOCK_4X4
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0x0000000000000001UL, // BLOCK_4X8
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0x0000000000000001UL, // BLOCK_8X4
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0x0000000000000001UL, // BLOCK_8X8
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0x0000000000000001UL, // BLOCK_8X16,
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0x0000000000000003UL, // BLOCK_16X8
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0x0000000000000003UL, // BLOCK_16X16
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0x0000000000000003UL, // BLOCK_16X32,
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0x000000000000000fUL, // BLOCK_32X16,
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0x000000000000000fUL, // BLOCK_32X32,
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0x000000000000000fUL, // BLOCK_32X64,
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0x00000000000000ffUL, // BLOCK_64X32,
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0x00000000000000ffUL, // BLOCK_64X64
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private static readonly ulong[] _abovePredictionMask = {
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0x0000000000000001UL, // BLOCK_4X4
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0x0000000000000001UL, // BLOCK_4X8
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0x0000000000000001UL, // BLOCK_8X4
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0x0000000000000001UL, // BLOCK_8X8
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0x0000000000000001UL, // BLOCK_8X16,
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0x0000000000000003UL, // BLOCK_16X8
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0x0000000000000003UL, // BLOCK_16X16
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0x0000000000000003UL, // BLOCK_16X32,
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0x000000000000000fUL, // BLOCK_32X16,
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0x000000000000000fUL, // BLOCK_32X32,
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0x000000000000000fUL, // BLOCK_32X64,
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0x00000000000000ffUL, // BLOCK_64X32,
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0x00000000000000ffUL, // BLOCK_64X64
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};
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// 64 bit mask to shift and set for each prediction size. A bit is set for
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// each 8x8 block that would be in the left most block of the given block
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// size in the 64x64 block.
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private static readonly ulong[] SizeMask = new ulong[]
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{
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0x0000000000000001UL, // BLOCK_4X4
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0x0000000000000001UL, // BLOCK_4X8
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0x0000000000000001UL, // BLOCK_8X4
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0x0000000000000001UL, // BLOCK_8X8
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0x0000000000000101UL, // BLOCK_8X16,
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0x0000000000000003UL, // BLOCK_16X8
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0x0000000000000303UL, // BLOCK_16X16
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0x0000000003030303UL, // BLOCK_16X32,
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0x0000000000000f0fUL, // BLOCK_32X16,
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0x000000000f0f0f0fUL, // BLOCK_32X32,
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0x0f0f0f0f0f0f0f0fUL, // BLOCK_32X64,
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0x00000000ffffffffUL, // BLOCK_64X32,
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0xffffffffffffffffUL, // BLOCK_64X64
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private static readonly ulong[] _sizeMask = {
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0x0000000000000001UL, // BLOCK_4X4
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0x0000000000000001UL, // BLOCK_4X8
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0x0000000000000001UL, // BLOCK_8X4
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0x0000000000000001UL, // BLOCK_8X8
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0x0000000000000101UL, // BLOCK_8X16,
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0x0000000000000003UL, // BLOCK_16X8
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0x0000000000000303UL, // BLOCK_16X16
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0x0000000003030303UL, // BLOCK_16X32,
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0x0000000000000f0fUL, // BLOCK_32X16,
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0x000000000f0f0f0fUL, // BLOCK_32X32,
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0x0f0f0f0f0f0f0f0fUL, // BLOCK_32X64,
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0x00000000ffffffffUL, // BLOCK_64X32,
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0xffffffffffffffffUL, // BLOCK_64X64
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};
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// These are used for masking the left and above borders.
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#pragma warning disable IDE0051 // Remove unused private member
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private const ulong LeftBorder = 0x1111111111111111UL;
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private const ulong AboveBorder = 0x000000ff000000ffUL;
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#pragma warning restore IDE0051
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// 16 bit masks for uv transform sizes.
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private static readonly ushort[] Left64X64TxformMaskUv = new ushort[]
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{
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0xffff, // TX_4X4
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0xffff, // TX_8x8
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0x5555, // TX_16x16
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0x1111, // TX_32x32
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private static readonly ushort[] _left64X64TxformMaskUv = {
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0xffff, // TX_4X4
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0xffff, // TX_8x8
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0x5555, // TX_16x16
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0x1111, // TX_32x32
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};
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private static readonly ushort[] Above64X64TxformMaskUv = new ushort[]
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{
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0xffff, // TX_4X4
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0xffff, // TX_8x8
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0x0f0f, // TX_16x16
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0x000f, // TX_32x32
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private static readonly ushort[] _above64X64TxformMaskUv = {
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0xffff, // TX_4X4
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0xffff, // TX_8x8
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0x0f0f, // TX_16x16
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0x000f, // TX_32x32
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};
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// 16 bit left mask to shift and set for each uv prediction size.
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private static readonly ushort[] LeftPredictionMaskUv = new ushort[]
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{
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0x0001, // BLOCK_4X4,
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0x0001, // BLOCK_4X8,
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0x0001, // BLOCK_8X4,
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0x0001, // BLOCK_8X8,
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0x0001, // BLOCK_8X16,
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0x0001, // BLOCK_16X8,
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0x0001, // BLOCK_16X16,
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0x0011, // BLOCK_16X32,
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0x0001, // BLOCK_32X16,
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0x0011, // BLOCK_32X32,
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0x1111, // BLOCK_32X64
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0x0011, // BLOCK_64X32,
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0x1111, // BLOCK_64X64
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private static readonly ushort[] _leftPredictionMaskUv = {
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0x0001, // BLOCK_4X4,
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0x0001, // BLOCK_4X8,
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0x0001, // BLOCK_8X4,
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0x0001, // BLOCK_8X8,
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0x0001, // BLOCK_8X16,
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0x0001, // BLOCK_16X8,
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0x0001, // BLOCK_16X16,
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0x0011, // BLOCK_16X32,
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0x0001, // BLOCK_32X16,
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0x0011, // BLOCK_32X32,
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0x1111, // BLOCK_32X64
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0x0011, // BLOCK_64X32,
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0x1111, // BLOCK_64X64
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};
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// 16 bit above mask to shift and set for uv each prediction size.
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private static readonly ushort[] AbovePredictionMaskUv = new ushort[]
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{
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0x0001, // BLOCK_4X4
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0x0001, // BLOCK_4X8
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0x0001, // BLOCK_8X4
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0x0001, // BLOCK_8X8
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0x0001, // BLOCK_8X16,
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0x0001, // BLOCK_16X8
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0x0001, // BLOCK_16X16
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0x0001, // BLOCK_16X32,
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0x0003, // BLOCK_32X16,
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0x0003, // BLOCK_32X32,
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0x0003, // BLOCK_32X64,
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0x000f, // BLOCK_64X32,
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0x000f, // BLOCK_64X64
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private static readonly ushort[] _abovePredictionMaskUv = {
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0x0001, // BLOCK_4X4
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0x0001, // BLOCK_4X8
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0x0001, // BLOCK_8X4
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0x0001, // BLOCK_8X8
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0x0001, // BLOCK_8X16,
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0x0001, // BLOCK_16X8
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0x0001, // BLOCK_16X16
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0x0001, // BLOCK_16X32,
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0x0003, // BLOCK_32X16,
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0x0003, // BLOCK_32X32,
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0x0003, // BLOCK_32X64,
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0x000f, // BLOCK_64X32,
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0x000f, // BLOCK_64X64
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};
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// 64 bit mask to shift and set for each uv prediction size
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private static readonly ushort[] SizeMaskUv = new ushort[]
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{
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0x0001, // BLOCK_4X4
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0x0001, // BLOCK_4X8
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0x0001, // BLOCK_8X4
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0x0001, // BLOCK_8X8
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0x0001, // BLOCK_8X16,
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0x0001, // BLOCK_16X8
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0x0001, // BLOCK_16X16
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0x0011, // BLOCK_16X32,
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0x0003, // BLOCK_32X16,
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0x0033, // BLOCK_32X32,
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0x3333, // BLOCK_32X64,
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0x00ff, // BLOCK_64X32,
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0xffff, // BLOCK_64X64
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private static readonly ushort[] _sizeMaskUv = {
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0x0001, // BLOCK_4X4
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0x0001, // BLOCK_4X8
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0x0001, // BLOCK_8X4
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0x0001, // BLOCK_8X8
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0x0001, // BLOCK_8X16,
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0x0001, // BLOCK_16X8
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0x0001, // BLOCK_16X16
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0x0011, // BLOCK_16X32,
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0x0003, // BLOCK_32X16,
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0x0033, // BLOCK_32X32,
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0x3333, // BLOCK_32X64,
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0x00ff, // BLOCK_64X32,
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0xffff, // BLOCK_64X64
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};
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#pragma warning disable IDE0051 // Remove unused private member
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private const ushort LeftBorderUv = 0x1111;
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private const ushort AboveBorderUv = 0x000f;
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#pragma warning restore IDE0051
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private static readonly int[] ModeLfLut = new int[]
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{
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // INTRA_MODES
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1, 1, 0, 1 // INTER_MODES (ZEROMV == 0)
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private static readonly int[] _modeLfLut = {
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, // INTRA_MODES
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1, 1, 0, 1, // INTER_MODES (ZEROMV == 0)
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};
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private static byte GetFilterLevel(ref LoopFilterInfoN lfiN, ref ModeInfo mi)
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{
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return lfiN.Lvl[mi.SegmentId][mi.RefFrame[0]][ModeLfLut[(int)mi.Mode]];
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return lfiN.Lvl[mi.SegmentId][mi.RefFrame[0]][_modeLfLut[(int)mi.Mode]];
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}
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private static ref LoopFilterMask GetLfm(ref Types.LoopFilter lf, int miRow, int miCol)
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@ -229,12 +222,11 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
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// 8x8 blocks in a superblock. A "1" represents the first block in a 16x16
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// or greater area.
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private static readonly byte[][] FirstBlockIn16x16 = new byte[][]
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{
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private static readonly byte[][] _firstBlockIn16X16 = {
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new byte[] { 1, 0, 1, 0, 1, 0, 1, 0 }, new byte[] { 0, 0, 0, 0, 0, 0, 0, 0 },
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new byte[] { 1, 0, 1, 0, 1, 0, 1, 0 }, new byte[] { 0, 0, 0, 0, 0, 0, 0, 0 },
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new byte[] { 1, 0, 1, 0, 1, 0, 1, 0 }, new byte[] { 0, 0, 0, 0, 0, 0, 0, 0 },
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new byte[] { 1, 0, 1, 0, 1, 0, 1, 0 }, new byte[] { 0, 0, 0, 0, 0, 0, 0, 0 },
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new byte[] { 1, 0, 1, 0, 1, 0, 1, 0 }, new byte[] { 0, 0, 0, 0, 0, 0, 0, 0 }
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};
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// This function sets up the bit masks for a block represented
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@ -257,21 +249,19 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
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int colInSb = (miCol & 7);
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int shiftY = colInSb + (rowInSb << 3);
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int shiftUv = (colInSb >> 1) + ((rowInSb >> 1) << 2);
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int buildUv = FirstBlockIn16x16[rowInSb][colInSb];
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int buildUv = _firstBlockIn16X16[rowInSb][colInSb];
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if (filterLevel == 0)
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{
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return;
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}
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else
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int index = shiftY;
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int i;
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for (i = 0; i < bh; i++)
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{
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int index = shiftY;
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int i;
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for (i = 0; i < bh; i++)
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{
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MemoryMarshal.CreateSpan(ref lfm.LflY[index], 64 - index).Slice(0, bw).Fill((byte)filterLevel);
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index += 8;
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}
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MemoryMarshal.CreateSpan(ref lfm.LflY[index], 64 - index)[..bw].Fill((byte)filterLevel);
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index += 8;
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}
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// These set 1 in the current block size for the block size edges.
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@ -286,13 +276,13 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
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//
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// U and V set things on a 16 bit scale.
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//
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aboveY |= AbovePredictionMask[(int)blockSize] << shiftY;
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leftY |= LeftPredictionMask[(int)blockSize] << shiftY;
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aboveY |= _abovePredictionMask[(int)blockSize] << shiftY;
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leftY |= _leftPredictionMask[(int)blockSize] << shiftY;
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if (buildUv != 0)
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{
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aboveUv |= (ushort)(AbovePredictionMaskUv[(int)blockSize] << shiftUv);
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leftUv |= (ushort)(LeftPredictionMaskUv[(int)blockSize] << shiftUv);
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aboveUv |= (ushort)(_abovePredictionMaskUv[(int)blockSize] << shiftUv);
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leftUv |= (ushort)(_leftPredictionMaskUv[(int)blockSize] << shiftUv);
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}
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// If the block has no coefficients and is not intra we skip applying
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@ -305,13 +295,13 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
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// Add a mask for the transform size. The transform size mask is set to
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// be correct for a 64x64 prediction block size. Mask to match the size of
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// the block we are working on and then shift it into place.
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aboveY |= (SizeMask[(int)blockSize] & Above64X64TxformMask[(int)txSizeY]) << shiftY;
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leftY |= (SizeMask[(int)blockSize] & Left64X64TxformMask[(int)txSizeY]) << shiftY;
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aboveY |= (_sizeMask[(int)blockSize] & _above64X64TxformMask[(int)txSizeY]) << shiftY;
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leftY |= (_sizeMask[(int)blockSize] & _left64X64TxformMask[(int)txSizeY]) << shiftY;
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if (buildUv != 0)
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{
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aboveUv |= (ushort)((SizeMaskUv[(int)blockSize] & Above64X64TxformMaskUv[(int)txSizeUv]) << shiftUv);
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leftUv |= (ushort)((SizeMaskUv[(int)blockSize] & Left64X64TxformMaskUv[(int)txSizeUv]) << shiftUv);
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aboveUv |= (ushort)((_sizeMaskUv[(int)blockSize] & _above64X64TxformMaskUv[(int)txSizeUv]) << shiftUv);
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leftUv |= (ushort)((_sizeMaskUv[(int)blockSize] & _left64X64TxformMaskUv[(int)txSizeUv]) << shiftUv);
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}
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// Try to determine what to do with the internal 4x4 block boundaries. These
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||||
|
|
@ -319,12 +309,12 @@ namespace Ryujinx.Graphics.Nvdec.Vp9
|
|||
// internal ones can be skipped and don't depend on the prediction block size.
|
||||
if (txSizeY == TxSize.Tx4x4)
|
||||
{
|
||||
int4X4Y |= SizeMask[(int)blockSize] << shiftY;
|
||||
int4X4Y |= _sizeMask[(int)blockSize] << shiftY;
|
||||
}
|
||||
|
||||
if (buildUv != 0 && txSizeUv == TxSize.Tx4x4)
|
||||
{
|
||||
int4X4Uv |= (ushort)((SizeMaskUv[(int)blockSize] & 0xffff) << shiftUv);
|
||||
int4X4Uv |= (ushort)((_sizeMaskUv[(int)blockSize] & 0xffff) << shiftUv);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue