10 commits

Author	SHA1	Message	Date
gdkchan	c7ecba1651	Add SHRN instruction, and fix ADDV	2018-02-14 02:43:21 -03:00
gdkchan	cf8cc418c3	Generate CIL for SCVTF (vector), add undefined encodings for some instructions	2018-02-12 00:37:20 -03:00
gdkchan	9eb16fa5a6	Add BRK on the opcode table	2018-02-10 12:16:48 -03:00
gdkchan	411949eeac	Move a few more SIMD instructions to emit CIL directly instead of a method call	2018-02-09 17:14:47 -03:00
gdkchan	c1198d7816	Add FVCTZS (fixed point variant) and LD1 (single structure variant) instructions	2018-02-09 00:26:20 -03:00
gdkchan	81ff75485c	Add ADC and SBC instructions	2018-02-07 20:46:36 -03:00
gdkchan	12688bd8b2	Add FMADD and FMSUB instructions	2018-02-07 20:07:16 -03:00
gdkchan	461533c44d	Add FMOV (scalar, register) and FCMPE instructions	2018-02-07 19:43:52 -03:00
gdkchan	61aae8f3a4	Implement SSHL instruction, fix exception on FMAX/FMIN, and use a better exception message for undefined/unimplemented instructions	2018-02-07 09:38:43 -03:00
gdkchan	b7e1d9930d	aloha	2018-02-04 20:08:20 -03:00