crafterpika/MeloNX
0
0
Fork 0
mirror of https://git.743378673.xyz/MeloNX/MeloNX.git synced 2025-07-29 09:57:09 +02:00
Code Issues Projects Releases Packages Wiki Activity
401 commits 23 branches 12 tags 948 MiB
Commit graph

116 commits

Author SHA1 Message Date
LDj3SNuD
8d1872cc96 Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update Pseudocode.cs

* Update Instructions.cs

* Update Bits.cs

* Create CpuTestSimd.cs

* Create CpuTestSimdReg.cs

* Update CpuTestSimd.cs

Provide a better supply of input values for the 20 Simd Tests.

* Update CpuTestSimdReg.cs

Provide a better supply of input values for the 20 Simd Tests.

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs
 2018-04-20 12:40:15 -03:00
gdkchan
0fcd0c3d86 Add SvcSetThreadActivity, tweak SignalProcessWideKey, add fmul32i shader instructions and other small fixes 2018-04-19 16:18:30 -03:00
MS-DOS1999
4c0da26c30 Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89) 2018-04-19 00:22:12 -03:00
LDj3SNuD
7a306d9caa Add ABS (scalar & vector), ADD (scalar), NEG (scalar) instructions. (#88) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update AOpCodeTable.cs
 2018-04-18 10:56:27 -03:00
LDj3SNuD
8fddc8351f Add TRN1 & TRN2 (vector) instructions. Add 4 simple tests (4S, 8B). (#77) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdMove.cs

* Update CpuTestSimdMove.cs

* Update AInstEmitSimdMove.cs

* Update CpuTestSimdMove.cs
 2018-04-12 11:52:00 -03:00
gdkchan
29338dc446 [CPU] Speed up translation a little bit 2018-04-11 14:44:03 -03:00
gdkchan
d8550b8cda [CPU] Fix CNT instruction 2018-04-10 20:58:32 -03:00
LDj3SNuD
bad6d9b7a0 Add FMUL (scalar, by element) instruction; add FRECPE, FRECPS (scalar & vector) instructions. Add 5 simple tests. (#74) 
* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdHelper.cs

* Update CpuTestSimdArithmetic.cs

* Update AOpCodeTable.cs

* Update AInstEmitSimdArithmetic.cs
 2018-04-08 16:08:57 -03:00
gdkchan
189387ffe5 [CPU] Fix CBZ/CBNZ with 32 bits operands 2018-04-06 17:22:26 -03:00
gdkchan
576da7ae32 [CPU] Fail early when the index/size of the vector is invalid 2018-04-06 15:39:39 -03:00
gdkchan
91d43b31f0 Fix FRSQRTS and FCM* (scalar) instructions 2018-04-06 10:20:17 -03:00
gdkchan
fe1d7c3c4d Add FMLS (vector) instruction 2018-04-06 01:41:54 -03:00
gdkchan
02f34e39e1 Add FRSQRTS and FCM* instructions 2018-04-05 23:28:12 -03:00
Merry
0c986ce8c5 Implement Frsqrte_S (#72) 
* Implement Frsqrte_S

* Implement Frsqrte_V

* Add Frsqrte_S test
 2018-04-05 20:36:19 -03:00
gdkchan
7d9a869b2e Add Faddp (vector) instruction 2018-04-04 22:13:10 -03:00
gdkchan
21f6e3699e HashSet is not thread safe, hopefully this fixes the CPU issue where it throws a exception on Add 2018-04-04 18:17:37 -03:00
gdkchan
cf7e8861d5 Add PRFM (unscaled) instruction 2018-04-04 18:10:20 -03:00
gdkchan
ac6e677798 Add FNEG (vector) instruction 2018-04-04 16:36:07 -03:00
gdkchan
9e36cf2dbb Fix 32-bits extended register instructions with 64-bits extensions 2018-03-30 23:32:06 -03:00
gdkchan
edbbc1dfec Enable all ld/st (single structure) instructions 2018-03-30 18:06:02 -03:00
gdkchan
63c0199701 Fix EXT/Widening instruction carrying garbage values on some cases, fix ABD (it shouldn't accumulate, this is another variation of the instruction) 2018-03-30 17:37:31 -03:00
gdkchan
b84e1e0653 Add BIT instruction 2018-03-30 16:46:00 -03:00
gdkchan
d884023579 Add UABD instruction 2018-03-30 16:30:23 -03:00
gdkchan
3594ead0ab Add UABDL instruction 2018-03-30 16:16:16 -03:00
gdkchan
dc6b3fce12 Add UADDL instruction 2018-03-30 15:55:28 -03:00
gdkchan
d60d206cde Add UHADD instruction 2018-03-30 12:37:07 -03:00
gdkchan
6268c2e3b4 Add FNMADD instruction 2018-03-24 00:28:23 -03:00
LDj3SNuD
7fb3d68a66 Add Cls Instruction. (#67) 
* Update AInstEmitAlu.cs

* Update ASoftFallback.cs

* Update AOpCodeTable.cs
 2018-03-23 22:06:05 -03:00
MS-DOS1999
3a7f42cc8e Add Frint Instructions and Tests (#62) 
* add 'ADC 32bit and Overflow' test

* Add WZR/WSP tests

* fix ADC and ADDS

* add ADCS test

* add SBCS test

* indent my code and delete comment

* '/' <- i hate you x)

* remove spacebar char

* remove false tab

* add frintx_S test

* update frintx_S test

* add ASRV test

* fix new line

* fix PR

* fix indent

* Add add_V tests

* work on Frintx_V

* Add Frintx_V Instruction

* add some instruction and test

* Syntax + indent

* Delete Console Write

* Delete Console Write 2

* CR del

* Skip NaNs tests

* Skip NaNs tests 2

* Fix errors 1

* Fix errors 2
 2018-03-23 07:40:23 -03:00
gdkchan
d0afedbf02 Rename IpcServices -> Services 2018-03-20 17:00:00 -03:00
gdkchan
b3ff3e85d3 Add BFI instruction, even more audout fixes 2018-03-16 00:42:44 -03:00
gdkchan
3a964ca287 Add MLA (vector by element), fixes some cases of MUL (vector by element)? 2018-03-15 22:36:47 -03:00
gdkchan
d79cab48ae Improvements to audout (#58) 
* Some audout refactoring and improvements

* More audio improvements

* Change ReadAsciiString to use long for the Size, avoids some casting
 2018-03-15 21:06:24 -03:00
gdkchan
af7683c6ad Fix crc32 instruction with size greater than a byte 2018-03-15 18:14:22 -03:00
gdkchan
36354a9589 Fix CPU instruction Ld/St (single structure) with index != 0 2018-03-15 12:59:23 -03:00
gdkchan
cb3fea6aaa CPU fix for the cases using a Mask with shift = 0 2018-03-14 01:59:22 -03:00
gdkchan
c29235420d Remove unused function from CPU 2018-03-14 00:57:07 -03:00
gdkchan
5bdaf351a0 Add CRC32 instruction and SLI (vector) 2018-03-14 00:12:05 -03:00
gdkchan
bc41bea0cb Add pl:u stub, use higher precision on CNTPCT_EL0 register tick count 2018-03-13 21:24:32 -03:00
gdkchan
54c791cd50 IAudioDeviceService -> IAudioDevice 2018-03-12 16:31:09 -03:00
gdkchan
2debd76527 Fix GetAudioRenderersProcessMasterVolume which was totally wrong 2018-03-12 16:29:06 -03:00
gdkchan
1b5df0a34d Allow more than one process, free resources on process dispose, implement SvcExitThread 2018-03-12 01:14:12 -03:00
gdkchan
d11a379678 Do not sign-extend timestamps 2018-03-10 20:51:55 -03:00
gdkchan
7064200261 Allow to enable/disable memory checks even on release mode through the flag, return error for invalid addresses on SvcMap*Memory svcs, do not return error on SvcQueryMemory (instead, return reserved for the end of the address space), other minor tweaks 2018-03-10 20:39:16 -03:00
gdkchan
475c64ede7 Fix EmitScalarUnaryOpF and add SSRA (vector) 2018-03-10 00:00:31 -03:00
gdkchan
aefc052a40 Add FRINTM (vector) instruction 2018-03-09 23:41:05 -03:00
gdkchan
4811d1acb1 Add SHLL instruction 2018-03-09 23:28:38 -03:00
gdkchan
510e7e0da0 Disable memory checks by default, even on debug, move ram memory allocation inside the CPU, since the size if fixed anyway, better heap region size 2018-03-09 23:12:57 -03:00
gdkchan
e6c0965ec7 Add SMLAL (vector), fix EXT instruction 2018-03-06 21:36:49 -03:00
gdkchan
bfa51ada69 Remove QueryMemory workaround 2018-03-05 16:20:30 -03:00