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Fix ~3500 analyser issues

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See merge request ryubing/ryujinx!44
This commit is contained in:
MrKev 2025-05-30 17:08:34 -05:00 • committed by LotP
parent 417df486b1
commit 361d0c5632
622 changed files with 3080 additions and 2652 deletions
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1
src/Ryujinx.Tests/Audio/Renderer/Server/PoolMapperTests.cs
View file

@ -85,7 +85,6 @@ namespace Ryujinx.Tests.Audio.Renderer.Server
memoryPoolStateArray[i].SetCpuAddress(CpuAddress + (ulong)i * CpuSize, CpuSize);
}
AddressInfo addressInfo = AddressInfo.Create();
PoolMapper poolMapper = new(DummyProcessHandle, true);

7
src/Ryujinx.Tests/Cpu/CpuTest.cs
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@ -13,11 +13,8 @@ namespace Ryujinx.Tests.Cpu
public class CpuTest
{
protected static readonly ulong Size = MemoryBlock.GetPageSize();
#pragma warning disable CA2211 // Non-constant fields should not be visible
protected static ulong CodeBaseAddress = Size;
protected static ulong DataBaseAddress = CodeBaseAddress + Size;
#pragma warning restore CA2211
protected static ulong CodeBaseAddress { get; set; } = Size;
protected static ulong DataBaseAddress { get; set; } = CodeBaseAddress + Size;
private static readonly bool _ignoreFpcrFz = false;
private static readonly bool _ignoreFpcrDn = false;

8
src/Ryujinx.Tests/Cpu/CpuTest32.cs
View file

@ -13,11 +13,8 @@ namespace Ryujinx.Tests.Cpu
public class CpuTest32
{
protected static readonly uint Size = (uint)MemoryBlock.GetPageSize();
#pragma warning disable CA2211 // Non-constant fields should not be visible
protected static uint CodeBaseAddress = Size;
protected static uint DataBaseAddress = CodeBaseAddress + Size;
#pragma warning restore CA2211
protected static uint CodeBaseAddress { get; set; } = Size;
protected static uint DataBaseAddress { get; set; } = CodeBaseAddress + Size;
private uint _currAddress;
private MemoryBlock _ram;
@ -421,6 +418,7 @@ namespace Ryujinx.Tests.Cpu
{
ManageFpTolerances(fpTolerances);
}
Assert.That(V128ToSimdValue(_context.GetV(1)), Is.EqualTo(_unicornEmu.Q[1]), "V1");
Assert.That(V128ToSimdValue(_context.GetV(2)), Is.EqualTo(_unicornEmu.Q[2]), "V2");
Assert.That(V128ToSimdValue(_context.GetV(3)), Is.EqualTo(_unicornEmu.Q[3]), "V3");

1
src/Ryujinx.Tests/Cpu/CpuTestAluRs32.cs
View file

@ -35,7 +35,6 @@ namespace Ryujinx.Tests.Cpu
}
#endregion
[Test, Pairwise]
public void Adc_Adcs_Rsc_Rscs_Sbc_Sbcs([ValueSource(nameof(_Adc_Adcs_Rsc_Rscs_Sbc_Sbcs_))] uint opcode,
[Values(0u, 13u)] uint rd,

2
src/Ryujinx.Tests/Cpu/CpuTestBf32.cs
View file

@ -65,6 +65,7 @@ namespace Ryujinx.Tests.Cpu
{
widthm1 -= (lsb + widthm1) - 31;
}
uint opcode = 0xe7e00050u; // UBFX R0, R0, #0, #1
opcode |= ((rd & 0xf) << 12);
opcode |= ((rn & 0xf) << 0);
@ -90,6 +91,7 @@ namespace Ryujinx.Tests.Cpu
{
widthm1 -= (lsb + widthm1) - 31;
}
uint opcode = 0xe7a00050u; // SBFX R0, R0, #0, #1
opcode |= ((rd & 0xf) << 12);
opcode |= ((rn & 0xf) << 0);

3
src/Ryujinx.Tests/Cpu/CpuTestMisc32.cs
View file

@ -90,16 +90,19 @@ namespace Ryujinx.Tests.Cpu
{
Opcode(0xEEE10A10); // VMSR FPSCR, R0
}
Opcode(0xEEB48A4A); // VCMP.F32 S16, S20
if (mode2)
{
Opcode(0xEEF10A10); // VMRS R0, FPSCR
Opcode(0xE200020F); // AND R0, #0xF0000000 // R0 &= "Fpsr.Nzcv".
}
if (mode3)
{
Opcode(0xEEF1FA10); // VMRS APSR_NZCV, FPSCR
}
Opcode(0xE12FFF1E); // BX LR
ExecuteOpcodes();

2
src/Ryujinx.Tests/Cpu/CpuTestSimdMemory32.cs
View file

@ -267,6 +267,7 @@ namespace Ryujinx.Tests.Cpu
opcode |= ((sd & 0x10) << 18);
opcode |= ((sd & 0xf) << 12);
}
opcode |= imm & 0xff;
SingleOpcode(opcode, r0: _testOffset);
@ -302,6 +303,7 @@ namespace Ryujinx.Tests.Cpu
opcode |= ((sd & 0x10) << 18);
opcode |= ((sd & 0xf) << 12);
}
opcode |= imm & 0xff;
(V128 vec1, V128 vec2, _, _) = GenerateTestVectors();

2
src/Ryujinx.Tests/Cpu/CpuTestSimdMov32.cs
View file

@ -459,6 +459,7 @@ namespace Ryujinx.Tests.Cpu
{
opcode |= 1 << 6;
}
opcode |= (vm & 0x10) << 1;
opcode |= (vm & 0xf);
opcode |= (vd & 0x10) << 18;
@ -511,6 +512,7 @@ namespace Ryujinx.Tests.Cpu
{
return; // Undefined.
}
opcode |= (vm & 0x10) << 1;
opcode |= (vm & 0xf);
opcode |= (vd & 0x10) << 18;

1
src/Ryujinx.Tests/Cpu/CpuTestSimdRegElem.cs
View file

@ -82,7 +82,6 @@ namespace Ryujinx.Tests.Cpu
}
#endregion
[Test, Pairwise]
public void Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_4H_8H([ValueSource(nameof(_Mla_Mls_Mul_Sqdmulh_Sqrdmulh_Ve_4H_8H_))] uint opcodes,
[Values(0u)] uint rd,

1
src/Ryujinx.Tests/Cpu/CpuTestT32Flow.cs
View file

@ -100,6 +100,7 @@ namespace Ryujinx.Tests.Cpu
{
ThumbOpcode(0xe7fe);
}
ThumbOpcode(0x4670); // label: MOV R0, LR
ThumbOpcode(0x2100); // MOVS R1, #0
ThumbOpcode(0x468e); // MOV LR, R1

5
src/Ryujinx.Tests/Cpu/CpuTestThumb.cs
View file

@ -111,6 +111,7 @@ namespace Ryujinx.Tests.Cpu
Assert.That(GetContext().GetPstateFlag(PState.CFlag), Is.EqualTo(w1 >= imm));
Assert.That(GetContext().GetPstateFlag(PState.VFlag), Is.EqualTo((overflow >> 31) != 0));
}
break;
case 2:
Assert.That(GetContext().GetX(1), Is.EqualTo((w1 + imm) & 0xffffffffu));
@ -166,6 +167,7 @@ namespace Ryujinx.Tests.Cpu
Assert.That(GetContext().GetPstateFlag(PState.NFlag), Is.EqualTo((result >> 31) != 0));
Assert.That(GetContext().GetPstateFlag(PState.ZFlag), Is.EqualTo(result == 0));
}
break;
case 9:
Assert.That(GetContext().GetX(1), Is.EqualTo((uint)-w2));
@ -180,6 +182,7 @@ namespace Ryujinx.Tests.Cpu
Assert.That(GetContext().GetPstateFlag(PState.CFlag), Is.EqualTo(w1 >= w2));
Assert.That(GetContext().GetPstateFlag(PState.VFlag), Is.EqualTo((overflow >> 31) != 0));
}
break;
case 11:
Assert.That(GetContext().GetX(1), Is.EqualTo(w1));
@ -191,6 +194,7 @@ namespace Ryujinx.Tests.Cpu
Assert.That(GetContext().GetPstateFlag(PState.CFlag), Is.EqualTo(result < w1));
Assert.That(GetContext().GetPstateFlag(PState.VFlag), Is.EqualTo((overflow >> 31) != 0));
}
break;
case 12:
Assert.That(GetContext().GetX(1), Is.EqualTo(w1 | w2));
@ -244,6 +248,7 @@ namespace Ryujinx.Tests.Cpu
Assert.That(GetContext().GetPstateFlag(PState.CFlag), Is.EqualTo(w1 >= w2));
Assert.That(GetContext().GetPstateFlag(PState.VFlag), Is.EqualTo((overflow >> 31) != 0));
}
break;
case 2:
Assert.That(GetContext().GetX((int)rd), Is.EqualTo(w2));

4
src/Ryujinx.Tests/Cpu/EnvironmentTests.cs
View file

@ -12,15 +12,13 @@ namespace Ryujinx.Tests.Cpu
{
internal class EnvironmentTests
{
#pragma warning disable IDE0052 // Remove unread private member
private static Translator _translator;
#pragma warning restore IDE0052
private static void EnsureTranslator()
{
// Create a translator, as one is needed to register the signal handler or emit methods.
_translator ??= new Translator(
new JitMemoryAllocator(),
new JitMemoryAllocator(),
new MockMemoryManager(),
AddressTable<ulong>.CreateForArm(true, MemoryManagerType.SoftwarePageTable));
}

7
src/Ryujinx.Tests/Memory/PartialUnmaps.cs
View file

@ -14,6 +14,7 @@ using System.Collections.Generic;
using System.Diagnostics.CodeAnalysis;
using System.Runtime.CompilerServices;
using System.Runtime.InteropServices;
using System.Runtime.Versioning;
using System.Threading;
namespace Ryujinx.Tests.Memory
@ -57,8 +58,8 @@ namespace Ryujinx.Tests.Memory
{
// Create a translator, as one is needed to register the signal handler or emit methods.
_translator ??= new Translator(
new JitMemoryAllocator(),
new MockMemoryManager(),
new JitMemoryAllocator(),
new MockMemoryManager(),
AddressTable<ulong>.CreateForArm(true, MemoryManagerType.SoftwarePageTable));
}
@ -289,7 +290,7 @@ namespace Ryujinx.Tests.Memory
[Test]
// Only test in Windows, as this is only used on Windows and uses Windows APIs for trimming.
[Platform("Win")]
[SuppressMessage("Interoperability", "CA1416: Validate platform compatibility")]
[SupportedOSPlatform("windows")]
public void ThreadLocalMap()
{
PartialUnmapState.Reset();

4
src/Ryujinx.Tests/Ryujinx.Tests.csproj
View file

@ -1,4 +1,4 @@
<Project Sdk="Microsoft.NET.Sdk">
<Project Sdk="Microsoft.NET.Sdk">
<PropertyGroup>
<OutputType>Exe</OutputType>
@ -13,7 +13,7 @@
</PropertyGroup>
<PropertyGroup>
<GenerateAssemblyInfo>false</GenerateAssemblyInfo>
<GenerateAssemblyInfo>true</GenerateAssemblyInfo>
<AllowUnsafeBlocks>True</AllowUnsafeBlocks>
</PropertyGroup>

4
src/Ryujinx.Tests/TreeDictionaryTests.cs
View file

@ -84,6 +84,7 @@ namespace Ryujinx.Tests.Collections
{
Console.WriteLine($"{node.Key} -> {node.Value}");
}
Assert.AreEqual(list.Count, dictionary.Count);
Assert.AreEqual(list[0].Key, 4);
Assert.AreEqual(list[1].Key, 2);
@ -118,6 +119,7 @@ namespace Ryujinx.Tests.Collections
{
Console.WriteLine($"{node.Key} -> {node.Value}");
}
Assert.AreEqual(list[0].Key, 4);
Assert.AreEqual(list[1].Key, 2);
Assert.AreEqual(list[2].Key, 10);
@ -149,6 +151,7 @@ namespace Ryujinx.Tests.Collections
{
Console.WriteLine($"{node.Key} -> {node.Value}");
}
Assert.AreEqual(list[0].Key, 4);
Assert.AreEqual(list[1].Key, 2);
Assert.AreEqual(list[2].Key, 9);
@ -224,7 +227,6 @@ namespace Ryujinx.Tests.Collections
Assert.AreEqual(list[4].Value, 4);
// Assure that none of the nodes locations have been modified.
Assert.AreEqual(list[0].Key, 4);
Assert.AreEqual(list[1].Key, 2);