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misc: chore: Fix object creation in Cpu project

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This commit is contained in:
Evan Husted 2025-01-26 15:15:48 -06:00
parent beab133c8d
commit 94b65aec02
5 changed files with 12 additions and 12 deletions
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6
src/Ryujinx.Cpu/AddressTable.cs
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@ -49,7 +49,7 @@ namespace ARMeilleure.Common
public TableSparseBlock(ulong size, Action<IntPtr> ensureMapped, PageInitDelegate pageInit) public TableSparseBlock(ulong size, Action<IntPtr> ensureMapped, PageInitDelegate pageInit)
{ {
SparseMemoryBlock block = new SparseMemoryBlock(size, pageInit, null); SparseMemoryBlock block = new(size, pageInit, null);
_trackingEvent = (ulong address, ulong size, bool write) => _trackingEvent = (ulong address, ulong size, bool write) =>
{ {
@ -363,7 +363,7 @@ namespace ARMeilleure.Common
/// <returns>The new sparse block that was added</returns> /// <returns>The new sparse block that was added</returns>
private TableSparseBlock ReserveNewSparseBlock() private TableSparseBlock ReserveNewSparseBlock()
{ {
TableSparseBlock block = new TableSparseBlock(_sparseBlockSize, EnsureMapped, InitLeafPage); TableSparseBlock block = new(_sparseBlockSize, EnsureMapped, InitLeafPage);
_sparseReserved.Add(block); _sparseReserved.Add(block);
_sparseReservedOffset = 0; _sparseReservedOffset = 0;
@ -416,7 +416,7 @@ namespace ARMeilleure.Common
IntPtr address = (IntPtr)NativeAllocator.Instance.Allocate((uint)size); IntPtr address = (IntPtr)NativeAllocator.Instance.Allocate((uint)size);
page = new AddressTablePage(false, address); page = new AddressTablePage(false, address);
Span<T> span = new Span<T>((void*)page.Address, length); Span<T> span = new((void*)page.Address, length);
span.Fill(fill); span.Fill(fill);
} }

2
src/Ryujinx.Cpu/Jit/MemoryManagerHostMapped.cs
View file

@ -340,7 +340,7 @@ namespace Ryujinx.Cpu.Jit
{ {
int pages = GetPagesCount(va, (uint)size, out va); int pages = GetPagesCount(va, (uint)size, out va);
List<MemoryRange> regions = new List<MemoryRange>(); List<MemoryRange> regions = new();
ulong regionStart = GetPhysicalAddressChecked(va); ulong regionStart = GetPhysicalAddressChecked(va);
ulong regionSize = PageSize; ulong regionSize = PageSize;

2
src/Ryujinx.Cpu/Jit/MemoryManagerHostTracked.cs
View file

@ -443,7 +443,7 @@ namespace Ryujinx.Cpu.Jit
return null; return null;
} }
List<HostMemoryRange> regions = new List<HostMemoryRange>(); List<HostMemoryRange> regions = new();
ulong endVa = va + size; ulong endVa = va + size;
try try

6
src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/Assembler.cs
View file

@ -342,7 +342,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
public readonly void Cset(Operand rd, ArmCondition condition) public readonly void Cset(Operand rd, ArmCondition condition)
{ {
Operand zr = new Operand(ZrRegister, RegisterType.Integer, rd.Type); Operand zr = new(ZrRegister, RegisterType.Integer, rd.Type);
Csinc(rd, zr, zr, (ArmCondition)((int)condition ^ 1)); Csinc(rd, zr, zr, (ArmCondition)((int)condition ^ 1));
} }
@ -857,7 +857,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
public readonly void PrfmI(Operand rn, int imm, uint type, uint target, uint policy) public readonly void PrfmI(Operand rn, int imm, uint type, uint target, uint policy)
{ {
Operand rt = new Operand((int)EncodeTypeTargetPolicy(type, target, policy), RegisterType.Integer, OperandType.I32); Operand rt = new((int)EncodeTypeTargetPolicy(type, target, policy), RegisterType.Integer, OperandType.I32);
WriteInstruction(0xf9800000u | (EncodeUImm12(imm, 3) << 10), rt, rn); WriteInstruction(0xf9800000u | (EncodeUImm12(imm, 3) << 10), rt, rn);
} }
@ -868,7 +868,7 @@ namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
public readonly void Prfum(Operand rn, int imm, uint type, uint target, uint policy) public readonly void Prfum(Operand rn, int imm, uint type, uint target, uint policy)
{ {
Operand rt = new Operand((int)EncodeTypeTargetPolicy(type, target, policy), RegisterType.Integer, OperandType.I32); Operand rt = new((int)EncodeTypeTargetPolicy(type, target, policy), RegisterType.Integer, OperandType.I32);
WriteInstruction(0xf8800000u | (EncodeSImm9(imm) << 12), rt, rn); WriteInstruction(0xf8800000u | (EncodeSImm9(imm) << 12), rt, rn);
} }

8
src/Ryujinx.Cpu/PrivateMemoryAllocator.cs
View file

@ -40,7 +40,7 @@ namespace Ryujinx.Cpu
Size = size; Size = size;
_freeRanges = new List<Range> _freeRanges = new List<Range>
{ {
new Range(0, size), new(0, size),
}; };
} }
@ -84,7 +84,7 @@ namespace Ryujinx.Cpu
private void InsertFreeRange(ulong offset, ulong size) private void InsertFreeRange(ulong offset, ulong size)
{ {
Range range = new Range(offset, size); Range range = new(offset, size);
int index = _freeRanges.BinarySearch(range); int index = _freeRanges.BinarySearch(range);
if (index < 0) if (index < 0)
{ {
@ -97,7 +97,7 @@ namespace Ryujinx.Cpu
private void InsertFreeRangeComingled(ulong offset, ulong size) private void InsertFreeRangeComingled(ulong offset, ulong size)
{ {
ulong endOffset = offset + size; ulong endOffset = offset + size;
Range range = new Range(offset, size); Range range = new(offset, size);
int index = _freeRanges.BinarySearch(range); int index = _freeRanges.BinarySearch(range);
if (index < 0) if (index < 0)
{ {
@ -214,7 +214,7 @@ namespace Ryujinx.Cpu
ulong blockAlignedSize = BitUtils.AlignUp(size, _blockAlignment); ulong blockAlignedSize = BitUtils.AlignUp(size, _blockAlignment);
MemoryBlock memory = new MemoryBlock(blockAlignedSize, _allocationFlags); MemoryBlock memory = new(blockAlignedSize, _allocationFlags);
T newBlock = createBlock(memory, blockAlignedSize); T newBlock = createBlock(memory, blockAlignedSize);
InsertBlock(newBlock); InsertBlock(newBlock);