diff --git a/src/ARMeilleure/CodeGen/Arm64/ArmCondition.cs b/src/ARMeilleure/CodeGen/Arm64/ArmCondition.cs index 5db898591..755e9573a 100644 --- a/src/ARMeilleure/CodeGen/Arm64/ArmCondition.cs +++ b/src/ARMeilleure/CodeGen/Arm64/ArmCondition.cs @@ -25,9 +25,9 @@ namespace ARMeilleure.CodeGen.Arm64 static class ComparisonArm64Extensions { - public static ArmCondition ToArmCondition(this Comparison comp) + extension(Comparison comparison) { - return comp switch + public ArmCondition Arm => comparison switch { #pragma warning disable IDE0055 // Disable formatting Comparison.Equal => ArmCondition.Eq, @@ -42,7 +42,7 @@ namespace ARMeilleure.CodeGen.Arm64 Comparison.LessUI => ArmCondition.LtUn, #pragma warning restore IDE0055 - _ => throw new ArgumentException(null, nameof(comp)), + _ => throw new ArgumentException(null, nameof(comparison)) }; } } diff --git a/src/ARMeilleure/CodeGen/Arm64/CodeGenerator.cs b/src/ARMeilleure/CodeGen/Arm64/CodeGenerator.cs index fbf4c1eb4..a07d31284 100644 --- a/src/ARMeilleure/CodeGen/Arm64/CodeGenerator.cs +++ b/src/ARMeilleure/CodeGen/Arm64/CodeGenerator.cs @@ -322,7 +322,7 @@ namespace ARMeilleure.CodeGen.Arm64 Debug.Assert(comp.Kind == OperandKind.Constant); - ArmCondition cond = ((Comparison)comp.AsInt32()).ToArmCondition(); + ArmCondition cond = ((Comparison)comp.AsInt32()).Arm; GenerateCompareCommon(context, operation); @@ -354,7 +354,7 @@ namespace ARMeilleure.CodeGen.Arm64 Debug.Assert(dest.Type == OperandType.I32); Debug.Assert(comp.Kind == OperandKind.Constant); - ArmCondition cond = ((Comparison)comp.AsInt32()).ToArmCondition(); + ArmCondition cond = ((Comparison)comp.AsInt32()).Arm; GenerateCompareCommon(context, operation); diff --git a/src/ARMeilleure/CodeGen/Optimizations/BlockPlacement.cs b/src/ARMeilleure/CodeGen/Optimizations/BlockPlacement.cs index 5f0e37721..4a9f6a834 100644 --- a/src/ARMeilleure/CodeGen/Optimizations/BlockPlacement.cs +++ b/src/ARMeilleure/CodeGen/Optimizations/BlockPlacement.cs @@ -51,7 +51,7 @@ namespace ARMeilleure.CodeGen.Optimizations if (trueSucc == block.ListNext) { Comparison comp = (Comparison)branchOp.GetSource(2).AsInt32(); - Comparison compInv = comp.Invert(); + Comparison compInv = comp.Inverse; branchOp.SetSource(2, Const((int)compInv)); diff --git a/src/ARMeilleure/CodeGen/Optimizations/Optimizer.cs b/src/ARMeilleure/CodeGen/Optimizations/Optimizer.cs index cbc6ab784..c1de22757 100644 --- a/src/ARMeilleure/CodeGen/Optimizations/Optimizer.cs +++ b/src/ARMeilleure/CodeGen/Optimizations/Optimizer.cs @@ -161,7 +161,7 @@ namespace ARMeilleure.CodeGen.Optimizations } else if (otherCompType == Comparison.Equal) { - propCompType = compType.Invert(); + propCompType = compType.Inverse; } else { diff --git a/src/ARMeilleure/CodeGen/X86/CodeGenerator.cs b/src/ARMeilleure/CodeGen/X86/CodeGenerator.cs index 86acea4a8..b7e18a263 100644 --- a/src/ARMeilleure/CodeGen/X86/CodeGenerator.cs +++ b/src/ARMeilleure/CodeGen/X86/CodeGenerator.cs @@ -623,7 +623,7 @@ namespace ARMeilleure.CodeGen.X86 Debug.Assert(comp.Kind == OperandKind.Constant); - X86Condition cond = ((Comparison)comp.AsInt32()).ToX86Condition(); + X86Condition cond = ((Comparison)comp.AsInt32()).X86; GenerateCompareCommon(context, operation); @@ -661,7 +661,7 @@ namespace ARMeilleure.CodeGen.X86 Debug.Assert(dest.Type == OperandType.I32); Debug.Assert(comp.Kind == OperandKind.Constant); - X86Condition cond = ((Comparison)comp.AsInt32()).ToX86Condition(); + X86Condition cond = ((Comparison)comp.AsInt32()).X86; GenerateCompareCommon(context, operation); diff --git a/src/ARMeilleure/CodeGen/X86/X86Condition.cs b/src/ARMeilleure/CodeGen/X86/X86Condition.cs index 70699a207..5153599b1 100644 --- a/src/ARMeilleure/CodeGen/X86/X86Condition.cs +++ b/src/ARMeilleure/CodeGen/X86/X86Condition.cs @@ -25,9 +25,9 @@ namespace ARMeilleure.CodeGen.X86 static class ComparisonX86Extensions { - public static X86Condition ToX86Condition(this Comparison comp) + extension(Comparison comparison) { - return comp switch + public X86Condition X86 => comparison switch { #pragma warning disable IDE0055 // Disable formatting Comparison.Equal => X86Condition.Equal, @@ -42,7 +42,7 @@ namespace ARMeilleure.CodeGen.X86 Comparison.LessUI => X86Condition.Below, #pragma warning restore IDE0055 - _ => throw new ArgumentException(null, nameof(comp)), + _ => throw new ArgumentException(null, nameof(comparison)) }; } } diff --git a/src/ARMeilleure/Decoders/Condition.cs b/src/ARMeilleure/Decoders/Condition.cs index 961825a10..bffe61ad5 100644 --- a/src/ARMeilleure/Decoders/Condition.cs +++ b/src/ARMeilleure/Decoders/Condition.cs @@ -22,11 +22,11 @@ namespace ARMeilleure.Decoders static class ConditionExtensions { - public static Condition Invert(this Condition cond) + extension(Condition condition) { // Bit 0 of all conditions is basically a negation bit, so // inverting this bit has the effect of inverting the condition. - return (Condition)((int)cond ^ 1); + public Condition Inverse => (Condition)((int)condition ^ 1); } } } diff --git a/src/ARMeilleure/Instructions/InstEmitMemoryHelper.cs b/src/ARMeilleure/Instructions/InstEmitMemoryHelper.cs index bb7e997b2..3874d0464 100644 --- a/src/ARMeilleure/Instructions/InstEmitMemoryHelper.cs +++ b/src/ARMeilleure/Instructions/InstEmitMemoryHelper.cs @@ -157,7 +157,7 @@ namespace ARMeilleure.Instructions context.Copy(temp, value); - if (!context.Memory.Type.IsHostMappedOrTracked()) + if (!context.Memory.Type.IsHostMappedOrTracked) { context.Branch(lblEnd); @@ -198,7 +198,7 @@ namespace ARMeilleure.Instructions SetInt(context, rt, value); - if (!context.Memory.Type.IsHostMappedOrTracked()) + if (!context.Memory.Type.IsHostMappedOrTracked) { context.Branch(lblEnd); @@ -265,7 +265,7 @@ namespace ARMeilleure.Instructions context.Copy(GetVec(rt), value); - if (!context.Memory.Type.IsHostMappedOrTracked()) + if (!context.Memory.Type.IsHostMappedOrTracked) { context.Branch(lblEnd); @@ -312,7 +312,7 @@ namespace ARMeilleure.Instructions break; } - if (!context.Memory.Type.IsHostMappedOrTracked()) + if (!context.Memory.Type.IsHostMappedOrTracked) { context.Branch(lblEnd); @@ -385,7 +385,7 @@ namespace ARMeilleure.Instructions break; } - if (!context.Memory.Type.IsHostMappedOrTracked()) + if (!context.Memory.Type.IsHostMappedOrTracked) { context.Branch(lblEnd); @@ -399,11 +399,11 @@ namespace ARMeilleure.Instructions public static Operand EmitPtPointerLoad(ArmEmitterContext context, Operand address, Operand lblSlowPath, bool write, int size) { - if (context.Memory.Type.IsHostMapped()) + if (context.Memory.Type.IsHostMapped) { return EmitHostMappedPointer(context, address); } - else if (context.Memory.Type.IsHostTracked()) + else if (context.Memory.Type.IsHostTracked) { if (address.Type == OperandType.I32) { diff --git a/src/ARMeilleure/IntermediateRepresentation/Comparison.cs b/src/ARMeilleure/IntermediateRepresentation/Comparison.cs index 3d6a9d818..c9d3b5c76 100644 --- a/src/ARMeilleure/IntermediateRepresentation/Comparison.cs +++ b/src/ARMeilleure/IntermediateRepresentation/Comparison.cs @@ -16,9 +16,9 @@ namespace ARMeilleure.IntermediateRepresentation static class ComparisonExtensions { - public static Comparison Invert(this Comparison comp) + extension(Comparison comparison) { - return (Comparison)((int)comp ^ 1); + public Comparison Inverse => (Comparison)((int)comparison ^ 1); } } } diff --git a/src/ARMeilleure/Memory/MemoryManagerType.cs b/src/ARMeilleure/Memory/MemoryManagerType.cs index cad7c3558..ce417ee7e 100644 --- a/src/ARMeilleure/Memory/MemoryManagerType.cs +++ b/src/ARMeilleure/Memory/MemoryManagerType.cs @@ -45,19 +45,12 @@ namespace ARMeilleure.Memory public static class MemoryManagerTypeExtensions { - public static bool IsHostMapped(this MemoryManagerType type) + extension(MemoryManagerType type) { - return type is MemoryManagerType.HostMapped or MemoryManagerType.HostMappedUnsafe; - } - - public static bool IsHostTracked(this MemoryManagerType type) - { - return type is MemoryManagerType.HostTracked or MemoryManagerType.HostTrackedUnsafe; - } - - public static bool IsHostMappedOrTracked(this MemoryManagerType type) - { - return type.IsHostMapped() || type.IsHostTracked(); + public bool IsHostMapped => type is MemoryManagerType.HostMapped or MemoryManagerType.HostMappedUnsafe; + public bool IsHostTracked => type is MemoryManagerType.HostTracked or MemoryManagerType.HostTrackedUnsafe; + + public bool IsHostMappedOrTracked => type.IsHostMapped || type.IsHostTracked; } } } diff --git a/src/ARMeilleure/Translation/Translator.cs b/src/ARMeilleure/Translation/Translator.cs index d8528cfd6..65183d310 100644 --- a/src/ARMeilleure/Translation/Translator.cs +++ b/src/ARMeilleure/Translation/Translator.cs @@ -368,7 +368,7 @@ namespace ARMeilleure.Translation if (block.Exit) { // Left option here as it may be useful if we need to return to managed rather than tail call in - // future. (eg. for debug) + // the future. (eg. for debug) bool useReturns = false; InstEmitFlowHelper.EmitVirtualJump(context, Const(block.Address), isReturn: useReturns); @@ -387,7 +387,7 @@ namespace ARMeilleure.Translation { context.SyncQcFlag(); - if (block.Branch != null && !block.Branch.Exit && block.Branch.Address <= block.Address) + if (block.Branch is { Exit: false } && block.Branch.Address <= block.Address) { EmitSynchronization(context); } @@ -399,14 +399,14 @@ namespace ARMeilleure.Translation { lblPredicateSkip = Label(); - InstEmitFlowHelper.EmitCondBranch(context, lblPredicateSkip, context.CurrentIfThenBlockCond.Invert()); + InstEmitFlowHelper.EmitCondBranch(context, lblPredicateSkip, context.CurrentIfThenBlockCond.Inverse); } - if (opCode is OpCode32 op && op.Cond < Condition.Al) + if (opCode is OpCode32 { Cond: < Condition.Al } op) { lblPredicateSkip = Label(); - InstEmitFlowHelper.EmitCondBranch(context, lblPredicateSkip, op.Cond.Invert()); + InstEmitFlowHelper.EmitCondBranch(context, lblPredicateSkip, op.Cond.Inverse); } if (opCode.Instruction.Emitter != null) diff --git a/src/Ryujinx.Cpu/Jit/JitCpuContext.cs b/src/Ryujinx.Cpu/Jit/JitCpuContext.cs index a29def8e8..9b2bf7015 100644 --- a/src/Ryujinx.Cpu/Jit/JitCpuContext.cs +++ b/src/Ryujinx.Cpu/Jit/JitCpuContext.cs @@ -17,7 +17,7 @@ namespace Ryujinx.Cpu.Jit _functionTable = AddressTable.CreateForArm(for64Bit, memory.Type); _translator = new Translator(new JitMemoryAllocator(forJit: true), memory, _functionTable); - if (memory.Type.IsHostMappedOrTracked()) + if (memory.Type.IsHostMappedOrTracked) { NativeSignalHandler.InitializeSignalHandler(); } diff --git a/src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitMemory.cs b/src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitMemory.cs index d8caee6e7..761335c47 100644 --- a/src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitMemory.cs +++ b/src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitMemory.cs @@ -1129,7 +1129,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64 // We don't need to mask the address for the safe mode, since it is already naturally limited to 32-bit // and can never reach out of the guest address space. - if (mmType.IsHostTracked()) + if (mmType.IsHostTracked) { int tempRegister = regAlloc.AllocateTempGprRegister(); @@ -1141,7 +1141,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64 regAlloc.FreeTempGprRegister(tempRegister); } - else if (mmType.IsHostMapped()) + else if (mmType.IsHostMapped) { asm.Add(destination64, basePointer, guestAddress); } diff --git a/src/Ryujinx.Cpu/LightningJit/Arm64/RegisterAllocator.cs b/src/Ryujinx.Cpu/LightningJit/Arm64/RegisterAllocator.cs index 1c6eab0de..425575df6 100644 --- a/src/Ryujinx.Cpu/LightningJit/Arm64/RegisterAllocator.cs +++ b/src/Ryujinx.Cpu/LightningJit/Arm64/RegisterAllocator.cs @@ -150,7 +150,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64 public static int CalculateMaxTemps(MemoryManagerType mmType) { - return mmType.IsHostMapped() ? 1 : 2; + return mmType.IsHostMapped ? 1 : 2; } public static int CalculateMaxTempsInclFixed(MemoryManagerType mmType) diff --git a/src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/InstEmitMemory.cs b/src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/InstEmitMemory.cs index 790a7de95..66b9768b9 100644 --- a/src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/InstEmitMemory.cs +++ b/src/Ryujinx.Cpu/LightningJit/Arm64/Target/Arm64/InstEmitMemory.cs @@ -544,7 +544,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64 { Operand basePointer = new(regAlloc.FixedPageTableRegister, RegisterType.Integer, OperandType.I64); - if (mmType.IsHostTracked()) + if (mmType.IsHostTracked) { int tempRegister = regAlloc.AllocateTempGprRegister(); @@ -562,7 +562,7 @@ namespace Ryujinx.Cpu.LightningJit.Arm64.Target.Arm64 regAlloc.FreeTempGprRegister(tempRegister); } - else if (mmType.IsHostMapped()) + else if (mmType.IsHostMapped) { if (mmType == MemoryManagerType.HostMapped) { diff --git a/src/Ryujinx.Cpu/LightningJit/Translator.cs b/src/Ryujinx.Cpu/LightningJit/Translator.cs index f3ae0a9c5..1ee6993d2 100644 --- a/src/Ryujinx.Cpu/LightningJit/Translator.cs +++ b/src/Ryujinx.Cpu/LightningJit/Translator.cs @@ -48,7 +48,7 @@ namespace Ryujinx.Cpu.LightningJit FunctionTable.Fill = (ulong)Stubs.SlowDispatchStub; - if (memory.Type.IsHostMappedOrTracked()) + if (memory.Type.IsHostMappedOrTracked) { NativeSignalHandler.InitializeSignalHandler(); }