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TSR Berry 2023-04-08 01:22:00 +02:00 • committed by Mary
parent cd124bda58
commit cee7121058
3466 changed files with 55 additions and 55 deletions
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33
ARMeilleure/Decoders/OpCodeSimdRegElemF.cs
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@ -1,33 +0,0 @@
namespace ARMeilleure.Decoders
{
class OpCodeSimdRegElemF : OpCodeSimdReg
{
public int Index { get; }
public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeSimdRegElemF(inst, address, opCode);
public OpCodeSimdRegElemF(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
{
switch ((opCode >> 21) & 3) // sz:L
{
case 0: // H:0
Index = (opCode >> 10) & 2; // 0, 2
break;
case 1: // H:1
Index = (opCode >> 10) & 2;
Index++; // 1, 3
break;
case 2: // H
Index = (opCode >> 11) & 1; // 0, 1
break;
default: Instruction = InstDescriptor.Undefined; break;
}
}
}
}