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Move solution and projects to src
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TSR Berry
Mary
parent
cd124bda58
commit
cee7121058
3466 changed files with 55 additions and 55 deletions
454
src/ARMeilleure/CodeGen/RegisterAllocators/HybridAllocator.cs
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454
src/ARMeilleure/CodeGen/RegisterAllocators/HybridAllocator.cs
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.Translation;
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using System;
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using System.Diagnostics;
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using System.Numerics;
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using System.Runtime.CompilerServices;
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using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
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using static ARMeilleure.IntermediateRepresentation.Operation.Factory;
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namespace ARMeilleure.CodeGen.RegisterAllocators
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{
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class HybridAllocator : IRegisterAllocator
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{
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private readonly struct BlockInfo
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{
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public bool HasCall { get; }
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public int IntFixedRegisters { get; }
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public int VecFixedRegisters { get; }
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public BlockInfo(bool hasCall, int intFixedRegisters, int vecFixedRegisters)
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{
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HasCall = hasCall;
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IntFixedRegisters = intFixedRegisters;
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VecFixedRegisters = vecFixedRegisters;
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}
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}
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private struct LocalInfo
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{
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public int Uses { get; set; }
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public int UsesAllocated { get; set; }
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public int Sequence { get; set; }
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public Operand Temp { get; set; }
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public Operand Register { get; set; }
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public Operand SpillOffset { get; set; }
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public OperandType Type { get; }
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private int _first;
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private int _last;
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public bool IsBlockLocal => _first == _last;
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public LocalInfo(OperandType type, int uses, int blkIndex)
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{
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Uses = uses;
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Type = type;
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UsesAllocated = 0;
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Sequence = 0;
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Temp = default;
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Register = default;
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SpillOffset = default;
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_first = -1;
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_last = -1;
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SetBlockIndex(blkIndex);
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}
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public void SetBlockIndex(int blkIndex)
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{
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if (_first == -1 || blkIndex < _first)
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{
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_first = blkIndex;
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}
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if (_last == -1 || blkIndex > _last)
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{
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_last = blkIndex;
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}
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}
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}
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private const int MaxIROperands = 4;
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// The "visited" state is stored in the MSB of the local's value.
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private const ulong VisitedMask = 1ul << 63;
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private BlockInfo[] _blockInfo;
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private LocalInfo[] _localInfo;
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private static bool IsVisited(Operand local)
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{
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Debug.Assert(local.Kind == OperandKind.LocalVariable);
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return (local.GetValueUnsafe() & VisitedMask) != 0;
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private static void SetVisited(Operand local)
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{
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Debug.Assert(local.Kind == OperandKind.LocalVariable);
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local.GetValueUnsafe() |= VisitedMask;
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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private ref LocalInfo GetLocalInfo(Operand local)
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{
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Debug.Assert(local.Kind == OperandKind.LocalVariable);
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Debug.Assert(IsVisited(local), "Local variable not visited. Used before defined?");
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return ref _localInfo[(uint)local.GetValueUnsafe() - 1];
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}
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public AllocationResult RunPass(ControlFlowGraph cfg, StackAllocator stackAlloc, RegisterMasks regMasks)
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{
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int intUsedRegisters = 0;
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int vecUsedRegisters = 0;
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int intFreeRegisters = regMasks.IntAvailableRegisters;
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int vecFreeRegisters = regMasks.VecAvailableRegisters;
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_blockInfo = new BlockInfo[cfg.Blocks.Count];
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_localInfo = new LocalInfo[cfg.Blocks.Count * 3];
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int localInfoCount = 0;
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for (int index = cfg.PostOrderBlocks.Length - 1; index >= 0; index--)
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{
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BasicBlock block = cfg.PostOrderBlocks[index];
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int intFixedRegisters = 0;
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int vecFixedRegisters = 0;
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bool hasCall = false;
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for (Operation node = block.Operations.First; node != default; node = node.ListNext)
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{
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if (node.Instruction == Instruction.Call)
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{
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hasCall = true;
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}
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foreach (Operand source in node.SourcesUnsafe)
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{
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if (source.Kind == OperandKind.LocalVariable)
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{
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GetLocalInfo(source).SetBlockIndex(block.Index);
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}
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else if (source.Kind == OperandKind.Memory)
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{
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MemoryOperand memOp = source.GetMemory();
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if (memOp.BaseAddress != default)
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{
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GetLocalInfo(memOp.BaseAddress).SetBlockIndex(block.Index);
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}
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if (memOp.Index != default)
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{
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GetLocalInfo(memOp.Index).SetBlockIndex(block.Index);
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}
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}
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}
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foreach (Operand dest in node.DestinationsUnsafe)
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{
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if (dest.Kind == OperandKind.LocalVariable)
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{
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if (IsVisited(dest))
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{
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GetLocalInfo(dest).SetBlockIndex(block.Index);
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}
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else
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{
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dest.NumberLocal(++localInfoCount);
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if (localInfoCount > _localInfo.Length)
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{
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Array.Resize(ref _localInfo, localInfoCount * 2);
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}
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SetVisited(dest);
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GetLocalInfo(dest) = new LocalInfo(dest.Type, UsesCount(dest), block.Index);
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}
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}
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else if (dest.Kind == OperandKind.Register)
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{
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if (dest.Type.IsInteger())
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{
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intFixedRegisters |= 1 << dest.GetRegister().Index;
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}
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else
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{
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vecFixedRegisters |= 1 << dest.GetRegister().Index;
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}
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}
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}
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}
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_blockInfo[block.Index] = new BlockInfo(hasCall, intFixedRegisters, vecFixedRegisters);
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}
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int sequence = 0;
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for (int index = cfg.PostOrderBlocks.Length - 1; index >= 0; index--)
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{
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BasicBlock block = cfg.PostOrderBlocks[index];
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ref BlockInfo blkInfo = ref _blockInfo[block.Index];
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int intLocalFreeRegisters = intFreeRegisters & ~blkInfo.IntFixedRegisters;
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int vecLocalFreeRegisters = vecFreeRegisters & ~blkInfo.VecFixedRegisters;
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int intCallerSavedRegisters = blkInfo.HasCall ? regMasks.IntCallerSavedRegisters : 0;
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int vecCallerSavedRegisters = blkInfo.HasCall ? regMasks.VecCallerSavedRegisters : 0;
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int intSpillTempRegisters = SelectSpillTemps(
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intCallerSavedRegisters & ~blkInfo.IntFixedRegisters,
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intLocalFreeRegisters);
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int vecSpillTempRegisters = SelectSpillTemps(
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vecCallerSavedRegisters & ~blkInfo.VecFixedRegisters,
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vecLocalFreeRegisters);
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intLocalFreeRegisters &= ~(intSpillTempRegisters | intCallerSavedRegisters);
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vecLocalFreeRegisters &= ~(vecSpillTempRegisters | vecCallerSavedRegisters);
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for (Operation node = block.Operations.First; node != default; node = node.ListNext)
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{
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int intLocalUse = 0;
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int vecLocalUse = 0;
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Operand AllocateRegister(Operand local)
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{
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ref LocalInfo info = ref GetLocalInfo(local);
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info.UsesAllocated++;
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Debug.Assert(info.UsesAllocated <= info.Uses);
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if (info.Register != default)
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{
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if (info.UsesAllocated == info.Uses)
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{
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Register reg = info.Register.GetRegister();
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if (local.Type.IsInteger())
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{
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intLocalFreeRegisters |= 1 << reg.Index;
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}
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else
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{
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vecLocalFreeRegisters |= 1 << reg.Index;
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}
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}
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return info.Register;
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}
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else
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{
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Operand temp = info.Temp;
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if (temp == default || info.Sequence != sequence)
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{
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temp = local.Type.IsInteger()
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? GetSpillTemp(local, intSpillTempRegisters, ref intLocalUse)
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: GetSpillTemp(local, vecSpillTempRegisters, ref vecLocalUse);
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info.Sequence = sequence;
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info.Temp = temp;
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}
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Operation fillOp = Operation(Instruction.Fill, temp, info.SpillOffset);
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block.Operations.AddBefore(node, fillOp);
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return temp;
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}
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}
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bool folded = false;
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// If operation is a copy of a local and that local is living on the stack, we turn the copy into
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// a fill, instead of inserting a fill before it.
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if (node.Instruction == Instruction.Copy)
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{
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Operand source = node.GetSource(0);
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if (source.Kind == OperandKind.LocalVariable)
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{
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ref LocalInfo info = ref GetLocalInfo(source);
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if (info.Register == default)
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{
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Operation fillOp = Operation(Instruction.Fill, node.Destination, info.SpillOffset);
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block.Operations.AddBefore(node, fillOp);
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block.Operations.Remove(node);
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node = fillOp;
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folded = true;
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}
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}
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}
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if (!folded)
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{
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foreach (ref Operand source in node.SourcesUnsafe)
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{
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if (source.Kind == OperandKind.LocalVariable)
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{
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source = AllocateRegister(source);
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}
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else if (source.Kind == OperandKind.Memory)
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{
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MemoryOperand memOp = source.GetMemory();
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if (memOp.BaseAddress != default)
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{
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memOp.BaseAddress = AllocateRegister(memOp.BaseAddress);
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}
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if (memOp.Index != default)
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{
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memOp.Index = AllocateRegister(memOp.Index);
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}
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}
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}
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}
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int intLocalAsg = 0;
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int vecLocalAsg = 0;
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foreach (ref Operand dest in node.DestinationsUnsafe)
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{
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if (dest.Kind != OperandKind.LocalVariable)
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{
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continue;
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}
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ref LocalInfo info = ref GetLocalInfo(dest);
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if (info.UsesAllocated == 0)
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{
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int mask = dest.Type.IsInteger()
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? intLocalFreeRegisters
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: vecLocalFreeRegisters;
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if (info.IsBlockLocal && mask != 0)
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{
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int selectedReg = BitOperations.TrailingZeroCount(mask);
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info.Register = Register(selectedReg, info.Type.ToRegisterType(), info.Type);
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if (dest.Type.IsInteger())
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{
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intLocalFreeRegisters &= ~(1 << selectedReg);
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intUsedRegisters |= 1 << selectedReg;
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}
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else
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{
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vecLocalFreeRegisters &= ~(1 << selectedReg);
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vecUsedRegisters |= 1 << selectedReg;
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}
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}
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else
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{
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info.Register = default;
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info.SpillOffset = Const(stackAlloc.Allocate(dest.Type.GetSizeInBytes()));
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}
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}
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info.UsesAllocated++;
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Debug.Assert(info.UsesAllocated <= info.Uses);
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if (info.Register != default)
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{
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dest = info.Register;
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}
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else
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{
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Operand temp = info.Temp;
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if (temp == default || info.Sequence != sequence)
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{
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temp = dest.Type.IsInteger()
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? GetSpillTemp(dest, intSpillTempRegisters, ref intLocalAsg)
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: GetSpillTemp(dest, vecSpillTempRegisters, ref vecLocalAsg);
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info.Sequence = sequence;
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info.Temp = temp;
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}
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dest = temp;
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Operation spillOp = Operation(Instruction.Spill, default, info.SpillOffset, temp);
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block.Operations.AddAfter(node, spillOp);
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node = spillOp;
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}
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}
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sequence++;
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intUsedRegisters |= intLocalAsg | intLocalUse;
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vecUsedRegisters |= vecLocalAsg | vecLocalUse;
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}
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}
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return new AllocationResult(intUsedRegisters, vecUsedRegisters, stackAlloc.TotalSize);
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}
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private static int SelectSpillTemps(int mask0, int mask1)
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{
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int selection = 0;
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int count = 0;
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while (count < MaxIROperands && mask0 != 0)
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{
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int mask = mask0 & -mask0;
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selection |= mask;
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mask0 &= ~mask;
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count++;
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}
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while (count < MaxIROperands && mask1 != 0)
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{
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int mask = mask1 & -mask1;
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selection |= mask;
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mask1 &= ~mask;
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count++;
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}
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Debug.Assert(count == MaxIROperands, "No enough registers for spill temps.");
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return selection;
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}
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private static Operand GetSpillTemp(Operand local, int freeMask, ref int useMask)
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{
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int selectedReg = BitOperations.TrailingZeroCount(freeMask & ~useMask);
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useMask |= 1 << selectedReg;
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return Register(selectedReg, local.Type.ToRegisterType(), local.Type);
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}
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private static int UsesCount(Operand local)
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{
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return local.AssignmentsCount + local.UsesCount;
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}
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}
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}
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