mirror of
https://git.ryujinx.app/ryubing/ryujinx.git
synced 2025-06-29 08:46:24 +02:00
[ARMeilleure] Address dotnet-format issues (#5357)
* dotnet format style --severity info Some changes were manually reverted. * dotnet format analyzers --serverity info Some changes have been minimally adapted. * Restore a few unused methods and variables * Silence dotnet format IDE0060 warnings * Silence dotnet format IDE0052 warnings * Address or silence dotnet format IDE1006 warnings * Address or silence dotnet format CA2208 warnings * Address dotnet format CA1822 warnings * Address or silence dotnet format CA1069 warnings * Silence CA1806 and CA1834 issues * Address dotnet format CA1401 warnings * Fix new dotnet-format issues after rebase * Address review comments * Address dotnet format CA2208 warnings properly * Fix formatting for switch expressions * Address most dotnet format whitespace warnings * Apply dotnet format whitespace formatting A few of them have been manually reverted and the corresponding warning was silenced * Add previously silenced warnings back I have no clue how these disappeared * Revert formatting changes for OpCodeTable.cs * Enable formatting for a few cases again * Format if-blocks correctly * Enable formatting for a few more cases again * Fix inline comment alignment * Run dotnet format after rebase and remove unused usings - analyzers - style - whitespace * Disable 'prefer switch expression' rule * Add comments to disabled warnings * Remove a few unused parameters * Adjust namespaces * Simplify properties and array initialization, Use const when possible, Remove trailing commas * Start working on disabled warnings * Fix and silence a few dotnet-format warnings again * Address IDE0251 warnings * Address a few disabled IDE0060 warnings * Silence IDE0060 in .editorconfig * Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas" This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e. * dotnet format whitespace after rebase * First dotnet format pass * Remove unnecessary formatting exclusion * Add unsafe dotnet format changes * Change visibility of JitSupportDarwin to internal
This commit is contained in:
TSRBerry
GitHub
parent
2de78a2d55
commit
ff53dcf560
300 changed files with 3515 additions and 3120 deletions
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@ -5,7 +5,6 @@ using ARMeilleure.Translation;
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using ARMeilleure.Translation.PTC;
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using System;
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using System.Reflection;
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using static ARMeilleure.Instructions.InstEmitHelper;
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using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
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@ -20,7 +19,7 @@ namespace ARMeilleure.Instructions
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{
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Zx,
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Sx32,
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Sx64
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Sx64,
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}
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public static void EmitLoadZx(ArmEmitterContext context, Operand address, int rt, int size)
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@ -66,9 +65,15 @@ namespace ARMeilleure.Instructions
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switch (size)
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{
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case 0: value = context.SignExtend8 (destType, value); break;
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case 1: value = context.SignExtend16(destType, value); break;
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case 2: value = context.SignExtend32(destType, value); break;
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case 0:
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value = context.SignExtend8(destType, value);
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break;
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case 1:
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value = context.SignExtend16(destType, value);
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break;
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case 2:
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value = context.SignExtend32(destType, value);
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break;
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}
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}
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@ -128,7 +133,7 @@ namespace ARMeilleure.Instructions
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Operand temp = context.AllocateLocal(size == 3 ? OperandType.I64 : OperandType.I32);
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Operand lblSlowPath = Label();
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Operand lblEnd = Label();
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Operand lblEnd = Label();
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Operand physAddr = EmitPtPointerLoad(context, address, lblSlowPath, write: false, size);
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@ -136,10 +141,18 @@ namespace ARMeilleure.Instructions
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switch (size)
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{
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case 0: value = context.Load8 (physAddr); break;
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case 1: value = context.Load16(physAddr); break;
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case 2: value = context.Load (OperandType.I32, physAddr); break;
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case 3: value = context.Load (OperandType.I64, physAddr); break;
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case 0:
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value = context.Load8(physAddr);
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break;
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case 1:
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value = context.Load16(physAddr);
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break;
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case 2:
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value = context.Load(OperandType.I32, physAddr);
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break;
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case 3:
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value = context.Load(OperandType.I64, physAddr);
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break;
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}
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context.Copy(temp, value);
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@ -161,7 +174,7 @@ namespace ARMeilleure.Instructions
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private static void EmitReadInt(ArmEmitterContext context, Operand address, int rt, int size)
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{
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Operand lblSlowPath = Label();
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Operand lblEnd = Label();
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Operand lblEnd = Label();
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Operand physAddr = EmitPtPointerLoad(context, address, lblSlowPath, write: false, size);
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@ -169,10 +182,18 @@ namespace ARMeilleure.Instructions
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switch (size)
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{
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case 0: value = context.Load8 (physAddr); break;
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case 1: value = context.Load16(physAddr); break;
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case 2: value = context.Load (OperandType.I32, physAddr); break;
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case 3: value = context.Load (OperandType.I64, physAddr); break;
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case 0:
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value = context.Load8(physAddr);
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break;
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case 1:
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value = context.Load16(physAddr);
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break;
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case 2:
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value = context.Load(OperandType.I32, physAddr);
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break;
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case 3:
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value = context.Load(OperandType.I64, physAddr);
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break;
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}
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SetInt(context, rt, value);
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@ -204,7 +225,7 @@ namespace ARMeilleure.Instructions
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1 => context.Load16(physAddr),
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2 => context.Load(OperandType.I32, physAddr),
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3 => context.Load(OperandType.I64, physAddr),
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_ => context.Load(OperandType.V128, physAddr)
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_ => context.Load(OperandType.V128, physAddr),
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};
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}
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@ -217,7 +238,7 @@ namespace ARMeilleure.Instructions
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int size)
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{
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Operand lblSlowPath = Label();
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Operand lblEnd = Label();
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Operand lblEnd = Label();
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Operand physAddr = EmitPtPointerLoad(context, address, lblSlowPath, write: false, size);
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@ -225,11 +246,21 @@ namespace ARMeilleure.Instructions
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switch (size)
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{
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case 0: value = context.VectorInsert8 (vector, context.Load8(physAddr), elem); break;
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case 1: value = context.VectorInsert16(vector, context.Load16(physAddr), elem); break;
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case 2: value = context.VectorInsert (vector, context.Load(OperandType.I32, physAddr), elem); break;
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case 3: value = context.VectorInsert (vector, context.Load(OperandType.I64, physAddr), elem); break;
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case 4: value = context.Load (OperandType.V128, physAddr); break;
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case 0:
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value = context.VectorInsert8(vector, context.Load8(physAddr), elem);
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break;
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case 1:
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value = context.VectorInsert16(vector, context.Load16(physAddr), elem);
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break;
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case 2:
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value = context.VectorInsert(vector, context.Load(OperandType.I32, physAddr), elem);
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break;
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case 3:
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value = context.VectorInsert(vector, context.Load(OperandType.I64, physAddr), elem);
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break;
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case 4:
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value = context.Load(OperandType.V128, physAddr);
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break;
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}
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context.Copy(GetVec(rt), value);
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@ -254,7 +285,7 @@ namespace ARMeilleure.Instructions
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private static void EmitWriteInt(ArmEmitterContext context, Operand address, int rt, int size)
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{
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Operand lblSlowPath = Label();
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Operand lblEnd = Label();
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Operand lblEnd = Label();
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Operand physAddr = EmitPtPointerLoad(context, address, lblSlowPath, write: true, size);
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@ -267,10 +298,18 @@ namespace ARMeilleure.Instructions
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switch (size)
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{
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case 0: context.Store8 (physAddr, value); break;
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case 1: context.Store16(physAddr, value); break;
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case 2: context.Store (physAddr, value); break;
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case 3: context.Store (physAddr, value); break;
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case 0:
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context.Store8(physAddr, value);
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break;
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case 1:
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context.Store16(physAddr, value);
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break;
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case 2:
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context.Store(physAddr, value);
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break;
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case 3:
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context.Store(physAddr, value);
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break;
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}
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if (!context.Memory.Type.IsHostMapped())
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@ -321,7 +360,7 @@ namespace ARMeilleure.Instructions
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int size)
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{
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Operand lblSlowPath = Label();
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Operand lblEnd = Label();
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Operand lblEnd = Label();
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Operand physAddr = EmitPtPointerLoad(context, address, lblSlowPath, write: true, size);
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@ -329,11 +368,21 @@ namespace ARMeilleure.Instructions
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switch (size)
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{
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case 0: context.Store8 (physAddr, context.VectorExtract8(value, elem)); break;
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case 1: context.Store16(physAddr, context.VectorExtract16(value, elem)); break;
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case 2: context.Store (physAddr, context.VectorExtract(OperandType.I32, value, elem)); break;
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case 3: context.Store (physAddr, context.VectorExtract(OperandType.I64, value, elem)); break;
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case 4: context.Store (physAddr, value); break;
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case 0:
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context.Store8(physAddr, context.VectorExtract8(value, elem));
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break;
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case 1:
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context.Store16(physAddr, context.VectorExtract16(value, elem));
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break;
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case 2:
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context.Store(physAddr, context.VectorExtract(OperandType.I32, value, elem));
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break;
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case 3:
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context.Store(physAddr, context.VectorExtract(OperandType.I64, value, elem));
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break;
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case 4:
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context.Store(physAddr, value);
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break;
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}
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if (!context.Memory.Type.IsHostMapped())
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@ -464,10 +513,18 @@ namespace ARMeilleure.Instructions
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switch (size)
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{
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case 0: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadByte)); break;
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case 1: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt16)); break;
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case 2: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt32)); break;
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case 3: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt64)); break;
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case 0:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadByte));
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break;
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case 1:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt16));
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break;
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case 2:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt32));
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break;
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case 3:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt64));
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break;
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}
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return context.Call(info, address);
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@ -485,21 +542,39 @@ namespace ARMeilleure.Instructions
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switch (size)
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{
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case 0: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadByte)); break;
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case 1: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt16)); break;
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case 2: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt32)); break;
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case 3: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt64)); break;
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case 4: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadVector128)); break;
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case 0:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadByte));
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break;
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case 1:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt16));
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break;
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case 2:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt32));
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break;
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case 3:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadUInt64));
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break;
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case 4:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.ReadVector128));
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break;
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}
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Operand value = context.Call(info, address);
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switch (size)
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{
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case 0: value = context.VectorInsert8 (vector, value, elem); break;
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case 1: value = context.VectorInsert16(vector, value, elem); break;
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case 2: value = context.VectorInsert (vector, value, elem); break;
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case 3: value = context.VectorInsert (vector, value, elem); break;
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case 0:
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value = context.VectorInsert8(vector, value, elem);
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break;
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case 1:
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value = context.VectorInsert16(vector, value, elem);
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break;
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case 2:
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value = context.VectorInsert(vector, value, elem);
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break;
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case 3:
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value = context.VectorInsert(vector, value, elem);
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break;
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}
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context.Copy(GetVec(rt), value);
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@ -511,10 +586,18 @@ namespace ARMeilleure.Instructions
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switch (size)
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{
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case 0: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteByte)); break;
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case 1: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt16)); break;
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case 2: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt32)); break;
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case 3: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt64)); break;
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case 0:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteByte));
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break;
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case 1:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt16));
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break;
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case 2:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt32));
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break;
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case 3:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt64));
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break;
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}
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Operand value = GetInt(context, rt);
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@ -538,11 +621,21 @@ namespace ARMeilleure.Instructions
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switch (size)
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{
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case 0: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteByte)); break;
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case 1: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt16)); break;
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case 2: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt32)); break;
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case 3: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt64)); break;
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case 4: info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteVector128)); break;
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case 0:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteByte));
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break;
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case 1:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt16));
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break;
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case 2:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt32));
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break;
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case 3:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteUInt64));
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break;
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case 4:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.WriteVector128));
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break;
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}
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Operand value = default;
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@ -551,10 +644,18 @@ namespace ARMeilleure.Instructions
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{
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switch (size)
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{
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case 0: value = context.VectorExtract8 (GetVec(rt), elem); break;
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case 1: value = context.VectorExtract16(GetVec(rt), elem); break;
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case 2: value = context.VectorExtract (OperandType.I32, GetVec(rt), elem); break;
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case 3: value = context.VectorExtract (OperandType.I64, GetVec(rt), elem); break;
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case 0:
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value = context.VectorExtract8(GetVec(rt), elem);
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break;
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case 1:
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value = context.VectorExtract16(GetVec(rt), elem);
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break;
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case 2:
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value = context.VectorExtract(OperandType.I32, GetVec(rt), elem);
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break;
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case 3:
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value = context.VectorExtract(OperandType.I64, GetVec(rt), elem);
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break;
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}
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}
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else
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@ -585,18 +686,14 @@ namespace ARMeilleure.Instructions
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// ARM32 helpers.
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public static Operand GetMemM(ArmEmitterContext context, bool setCarry = true)
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{
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switch (context.CurrOp)
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return context.CurrOp switch
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{
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case IOpCode32MemRsImm op: return GetMShiftedByImmediate(context, op, setCarry);
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case IOpCode32MemReg op: return GetIntA32(context, op.Rm);
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case IOpCode32Mem op: return Const(op.Immediate);
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case OpCode32SimdMemImm op: return Const(op.Immediate);
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default: throw InvalidOpCodeType(context.CurrOp);
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}
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IOpCode32MemRsImm op => GetMShiftedByImmediate(context, op, setCarry),
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IOpCode32MemReg op => GetIntA32(context, op.Rm),
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IOpCode32Mem op => Const(op.Immediate),
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OpCode32SimdMemImm op => Const(op.Immediate),
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_ => throw InvalidOpCodeType(context.CurrOp),
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};
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}
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private static Exception InvalidOpCodeType(OpCode opCode)
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@ -614,9 +711,15 @@ namespace ARMeilleure.Instructions
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{
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switch (op.ShiftType)
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{
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case ShiftType.Lsr: shift = 32; break;
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case ShiftType.Asr: shift = 32; break;
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case ShiftType.Ror: shift = 1; break;
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case ShiftType.Lsr:
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shift = 32;
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break;
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case ShiftType.Asr:
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shift = 32;
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break;
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case ShiftType.Ror:
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shift = 1;
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break;
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}
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}
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@ -626,9 +729,15 @@ namespace ARMeilleure.Instructions
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switch (op.ShiftType)
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{
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case ShiftType.Lsl: m = InstEmitAluHelper.GetLslC(context, m, setCarry, shift); break;
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case ShiftType.Lsr: m = InstEmitAluHelper.GetLsrC(context, m, setCarry, shift); break;
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case ShiftType.Asr: m = InstEmitAluHelper.GetAsrC(context, m, setCarry, shift); break;
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case ShiftType.Lsl:
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m = InstEmitAluHelper.GetLslC(context, m, setCarry, shift);
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break;
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case ShiftType.Lsr:
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m = InstEmitAluHelper.GetLsrC(context, m, setCarry, shift);
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break;
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||||
case ShiftType.Asr:
|
||||
m = InstEmitAluHelper.GetAsrC(context, m, setCarry, shift);
|
||||
break;
|
||||
case ShiftType.Ror:
|
||||
if (op.Immediate != 0)
|
||||
{
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue