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https://git.ryujinx.app/ryubing/ryujinx.git
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[ARMeilleure] Address dotnet-format issues (#5357)
* dotnet format style --severity info Some changes were manually reverted. * dotnet format analyzers --serverity info Some changes have been minimally adapted. * Restore a few unused methods and variables * Silence dotnet format IDE0060 warnings * Silence dotnet format IDE0052 warnings * Address or silence dotnet format IDE1006 warnings * Address or silence dotnet format CA2208 warnings * Address dotnet format CA1822 warnings * Address or silence dotnet format CA1069 warnings * Silence CA1806 and CA1834 issues * Address dotnet format CA1401 warnings * Fix new dotnet-format issues after rebase * Address review comments * Address dotnet format CA2208 warnings properly * Fix formatting for switch expressions * Address most dotnet format whitespace warnings * Apply dotnet format whitespace formatting A few of them have been manually reverted and the corresponding warning was silenced * Add previously silenced warnings back I have no clue how these disappeared * Revert formatting changes for OpCodeTable.cs * Enable formatting for a few cases again * Format if-blocks correctly * Enable formatting for a few more cases again * Fix inline comment alignment * Run dotnet format after rebase and remove unused usings - analyzers - style - whitespace * Disable 'prefer switch expression' rule * Add comments to disabled warnings * Remove a few unused parameters * Adjust namespaces * Simplify properties and array initialization, Use const when possible, Remove trailing commas * Start working on disabled warnings * Fix and silence a few dotnet-format warnings again * Address IDE0251 warnings * Address a few disabled IDE0060 warnings * Silence IDE0060 in .editorconfig * Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas" This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e. * dotnet format whitespace after rebase * First dotnet format pass * Remove unnecessary formatting exclusion * Add unsafe dotnet format changes * Change visibility of JitSupportDarwin to internal
This commit is contained in:
TSRBerry
GitHub
parent
2de78a2d55
commit
ff53dcf560
300 changed files with 3515 additions and 3120 deletions
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@ -7,7 +7,6 @@ using ARMeilleure.State;
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using ARMeilleure.Translation;
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using System;
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using System.Diagnostics;
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using static ARMeilleure.Instructions.InstEmitHelper;
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using static ARMeilleure.Instructions.InstEmitSimdHelper;
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using static ARMeilleure.Instructions.InstEmitSimdHelper32;
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@ -185,11 +184,12 @@ namespace ARMeilleure.Instructions
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int eSize = 8 << op.Size;
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Operand res = eSize switch {
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8 => Clz_V_I8 (context, GetVec(op.Rn)),
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Operand res = eSize switch
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{
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8 => Clz_V_I8(context, GetVec(op.Rn)),
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16 => Clz_V_I16(context, GetVec(op.Rn)),
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32 => Clz_V_I32(context, GetVec(op.Rn)),
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_ => default
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_ => default,
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};
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if (res != default)
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@ -230,14 +230,14 @@ namespace ARMeilleure.Instructions
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Operand clzTable = X86GetScalar(context, 0x01_01_01_01_02_02_03_04);
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Operand maskLow = X86GetAllElements(context, 0x0f_0f_0f_0f);
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Operand c04 = X86GetAllElements(context, 0x04_04_04_04);
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Operand c04 = X86GetAllElements(context, 0x04_04_04_04);
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// CLZ of low 4 bits of elements in arg.
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Operand loClz = context.AddIntrinsic(Intrinsic.X86Pshufb, clzTable, arg);
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// Get the high 4 bits of elements in arg.
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Operand hiArg = context.AddIntrinsic(Intrinsic.X86Psrlw, arg, Const(4));
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hiArg = context.AddIntrinsic(Intrinsic.X86Pand, hiArg, maskLow);
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hiArg = context.AddIntrinsic(Intrinsic.X86Pand, hiArg, maskLow);
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// CLZ of high 4 bits of elements in arg.
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Operand hiClz = context.AddIntrinsic(Intrinsic.X86Pshufb, clzTable, hiArg);
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@ -257,8 +257,8 @@ namespace ARMeilleure.Instructions
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}
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Operand maskSwap = X86GetElements(context, 0x80_0f_80_0d_80_0b_80_09, 0x80_07_80_05_80_03_80_01);
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Operand maskLow = X86GetAllElements(context, 0x00ff_00ff);
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Operand c0008 = X86GetAllElements(context, 0x0008_0008);
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Operand maskLow = X86GetAllElements(context, 0x00ff_00ff);
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Operand c0008 = X86GetAllElements(context, 0x0008_0008);
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// CLZ pair of high 8 and low 8 bits of elements in arg.
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Operand hiloClz = Clz_V_I8(context, arg);
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@ -282,12 +282,14 @@ namespace ARMeilleure.Instructions
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return default;
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}
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#pragma warning disable IDE0055 // Disable formatting
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Operand AddVectorI32(Operand op0, Operand op1) => context.AddIntrinsic(Intrinsic.X86Paddd, op0, op1);
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Operand SubVectorI32(Operand op0, Operand op1) => context.AddIntrinsic(Intrinsic.X86Psubd, op0, op1);
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Operand ShiftRightVectorUI32(Operand op0, int imm8) => context.AddIntrinsic(Intrinsic.X86Psrld, op0, Const(imm8));
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Operand OrVector(Operand op0, Operand op1) => context.AddIntrinsic(Intrinsic.X86Por, op0, op1);
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Operand AndVector(Operand op0, Operand op1) => context.AddIntrinsic(Intrinsic.X86Pand, op0, op1);
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Operand NotVector(Operand op0) => context.AddIntrinsic(Intrinsic.X86Pandn, op0, context.VectorOne());
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#pragma warning restore IDE0055
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Operand c55555555 = X86GetAllElements(context, 0x55555555);
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Operand c33333333 = X86GetAllElements(context, 0x33333333);
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@ -311,24 +313,24 @@ namespace ARMeilleure.Instructions
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// Count leading 1s, which is the population count.
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tmp0 = ShiftRightVectorUI32(res, 1);
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tmp0 = AndVector(tmp0, c55555555);
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res = SubVectorI32(res, tmp0);
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res = SubVectorI32(res, tmp0);
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tmp0 = ShiftRightVectorUI32(res, 2);
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tmp0 = AndVector(tmp0, c33333333);
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tmp1 = AndVector(res, c33333333);
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res = AddVectorI32(tmp0, tmp1);
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res = AddVectorI32(tmp0, tmp1);
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tmp0 = ShiftRightVectorUI32(res, 4);
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tmp0 = AddVectorI32(tmp0, res);
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res = AndVector(tmp0, c0f0f0f0f);
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res = AndVector(tmp0, c0f0f0f0f);
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tmp0 = ShiftRightVectorUI32(res, 8);
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res = AddVectorI32(tmp0, res);
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res = AddVectorI32(tmp0, res);
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tmp0 = ShiftRightVectorUI32(res, 16);
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res = AddVectorI32(tmp0, res);
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res = AddVectorI32(tmp0, res);
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res = AndVector(res, c0000003f);
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res = AndVector(res, c0000003f);
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return res;
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}
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@ -2436,8 +2438,8 @@ namespace ARMeilleure.Instructions
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if (sizeF == 0)
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{
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Operand maskHalf = X86GetScalar(context, 0.5f);
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Operand maskThree = X86GetScalar(context, 3f);
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Operand maskHalf = X86GetScalar(context, 0.5f);
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Operand maskThree = X86GetScalar(context, 3f);
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Operand maskOneHalf = X86GetScalar(context, 1.5f);
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if (Optimizations.UseFma)
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@ -2457,8 +2459,8 @@ namespace ARMeilleure.Instructions
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}
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else /* if (sizeF == 1) */
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{
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Operand maskHalf = X86GetScalar(context, 0.5d);
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Operand maskThree = X86GetScalar(context, 3d);
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Operand maskHalf = X86GetScalar(context, 0.5d);
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Operand maskThree = X86GetScalar(context, 3d);
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Operand maskOneHalf = X86GetScalar(context, 1.5d);
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if (Optimizations.UseFma)
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@ -2505,8 +2507,8 @@ namespace ARMeilleure.Instructions
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if (sizeF == 0)
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{
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Operand maskHalf = X86GetAllElements(context, 0.5f);
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Operand maskThree = X86GetAllElements(context, 3f);
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Operand maskHalf = X86GetAllElements(context, 0.5f);
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Operand maskThree = X86GetAllElements(context, 3f);
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Operand maskOneHalf = X86GetAllElements(context, 1.5f);
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if (Optimizations.UseFma)
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@ -2519,7 +2521,7 @@ namespace ARMeilleure.Instructions
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res = context.AddIntrinsic(Intrinsic.X86Subps, maskThree, res);
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}
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res = context.AddIntrinsic(Intrinsic.X86Mulps, maskHalf, res);
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res = context.AddIntrinsic(Intrinsic.X86Mulps, maskHalf, res);
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res = EmitSse41RecipStepSelectOpF(context, n, m, res, maskOneHalf, scalar: false, sizeF);
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if (op.RegisterSize == RegisterSize.Simd64)
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@ -2531,8 +2533,8 @@ namespace ARMeilleure.Instructions
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}
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else /* if (sizeF == 1) */
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{
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Operand maskHalf = X86GetAllElements(context, 0.5d);
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Operand maskThree = X86GetAllElements(context, 3d);
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Operand maskHalf = X86GetAllElements(context, 0.5d);
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Operand maskThree = X86GetAllElements(context, 3d);
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Operand maskOneHalf = X86GetAllElements(context, 1.5d);
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if (Optimizations.UseFma)
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@ -2545,7 +2547,7 @@ namespace ARMeilleure.Instructions
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res = context.AddIntrinsic(Intrinsic.X86Subpd, maskThree, res);
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}
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res = context.AddIntrinsic(Intrinsic.X86Mulpd, maskHalf, res);
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res = context.AddIntrinsic(Intrinsic.X86Mulpd, maskHalf, res);
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res = EmitSse41RecipStepSelectOpF(context, n, m, res, maskOneHalf, scalar: false, sizeF);
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context.Copy(GetVec(op.Rd), res);
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@ -2824,10 +2826,10 @@ namespace ARMeilleure.Instructions
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for (int i = 0; i < 8; i++)
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{
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Operand mask = context.AddIntrinsic(Intrinsic.X86Psllw, n, Const(15 - i));
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mask = context.AddIntrinsic(Intrinsic.X86Psraw, mask, Const(15));
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mask = context.AddIntrinsic(Intrinsic.X86Psraw, mask, Const(15));
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Operand tmp = context.AddIntrinsic(Intrinsic.X86Psllw, m, Const(i));
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tmp = context.AddIntrinsic(Intrinsic.X86Pand, tmp, mask);
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tmp = context.AddIntrinsic(Intrinsic.X86Pand, tmp, mask);
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res = context.AddIntrinsic(Intrinsic.X86Pxor, res, tmp);
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}
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@ -2839,12 +2841,12 @@ namespace ARMeilleure.Instructions
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for (int i = 0; i < 64; i++)
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{
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Operand mask = context.AddIntrinsic(Intrinsic.X86Movlhps, n, n);
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mask = context.AddIntrinsic(Intrinsic.X86Psllq, mask, Const(63 - i));
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mask = context.AddIntrinsic(Intrinsic.X86Psrlq, mask, Const(63));
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mask = context.AddIntrinsic(Intrinsic.X86Psubq, zero, mask);
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mask = context.AddIntrinsic(Intrinsic.X86Psllq, mask, Const(63 - i));
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mask = context.AddIntrinsic(Intrinsic.X86Psrlq, mask, Const(63));
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mask = context.AddIntrinsic(Intrinsic.X86Psubq, zero, mask);
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Operand tmp = EmitSse2Sll_128(context, m, i);
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tmp = context.AddIntrinsic(Intrinsic.X86Pand, tmp, mask);
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tmp = context.AddIntrinsic(Intrinsic.X86Pand, tmp, mask);
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res = context.AddIntrinsic(Intrinsic.X86Pxor, res, tmp);
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}
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@ -3119,7 +3121,7 @@ namespace ARMeilleure.Instructions
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Operand n = GetVec(op.Rn);
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Operand m = GetVec(op.Rm);
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Operand res = context.AddIntrinsic(Intrinsic.X86Pand, n, m);
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Operand res = context.AddIntrinsic(Intrinsic.X86Pand, n, m);
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Operand res2 = context.AddIntrinsic(Intrinsic.X86Pxor, n, m);
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Intrinsic shiftInst = op.Size == 1 ? Intrinsic.X86Psraw : Intrinsic.X86Psrad;
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@ -4058,7 +4060,7 @@ namespace ARMeilleure.Instructions
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Operand n = GetVec(op.Rn);
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Operand m = GetVec(op.Rm);
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Operand res = context.AddIntrinsic(Intrinsic.X86Pand, n, m);
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Operand res = context.AddIntrinsic(Intrinsic.X86Pand, n, m);
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Operand res2 = context.AddIntrinsic(Intrinsic.X86Pxor, n, m);
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Intrinsic shiftInst = op.Size == 1 ? Intrinsic.X86Psrlw : Intrinsic.X86Psrld;
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@ -4594,7 +4596,7 @@ namespace ARMeilleure.Instructions
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{
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int pairIndex = index << 1;
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Operand ne0 = EmitVectorExtract(context, op.Rn, pairIndex, op.Size, signed);
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Operand ne0 = EmitVectorExtract(context, op.Rn, pairIndex, op.Size, signed);
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Operand ne1 = EmitVectorExtract(context, op.Rn, pairIndex + 1, op.Size, signed);
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Operand e = context.Add(ne0, ne1);
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@ -4686,7 +4688,7 @@ namespace ARMeilleure.Instructions
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Debug.Assert(op1.Type == OperandType.I64 && op2.Type == OperandType.I64);
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Operand cmp = signed
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? context.ICompareGreaterOrEqual (op1, op2)
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? context.ICompareGreaterOrEqual(op1, op2)
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: context.ICompareGreaterOrEqualUI(op1, op2);
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return context.ConditionalSelect(cmp, op1, op2);
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@ -4697,7 +4699,7 @@ namespace ARMeilleure.Instructions
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Debug.Assert(op1.Type == OperandType.I64 && op2.Type == OperandType.I64);
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Operand cmp = signed
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? context.ICompareLessOrEqual (op1, op2)
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? context.ICompareLessOrEqual(op1, op2)
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: context.ICompareLessOrEqualUI(op1, op2);
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return context.ConditionalSelect(cmp, op1, op2);
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@ -4852,10 +4854,10 @@ namespace ARMeilleure.Instructions
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Operand mask1 = context.AddIntrinsic(Intrinsic.X86Cmpps, opF, opF, Const((int)CmpCondition.UnorderedQ));
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Operand mask2 = context.AddIntrinsic(Intrinsic.X86Pand, opF, qMask);
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mask2 = context.AddIntrinsic(Intrinsic.X86Cmpps, mask2, qMask, Const((int)CmpCondition.Equal));
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Operand mask2 = context.AddIntrinsic(Intrinsic.X86Pand, opF, qMask);
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mask2 = context.AddIntrinsic(Intrinsic.X86Cmpps, mask2, qMask, Const((int)CmpCondition.Equal));
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qNaNMask = isQNaN == null || (bool)isQNaN ? context.AddIntrinsic(Intrinsic.X86Andps, mask2, mask1) : default;
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qNaNMask = isQNaN == null || (bool)isQNaN ? context.AddIntrinsic(Intrinsic.X86Andps, mask2, mask1) : default;
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sNaNMask = isQNaN == null || !(bool)isQNaN ? context.AddIntrinsic(Intrinsic.X86Andnps, mask2, mask1) : default;
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}
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else /* if ((op.Size & 1) == 1) */
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@ -4866,10 +4868,10 @@ namespace ARMeilleure.Instructions
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Operand mask1 = context.AddIntrinsic(Intrinsic.X86Cmppd, opF, opF, Const((int)CmpCondition.UnorderedQ));
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Operand mask2 = context.AddIntrinsic(Intrinsic.X86Pand, opF, qMask);
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mask2 = context.AddIntrinsic(Intrinsic.X86Cmppd, mask2, qMask, Const((int)CmpCondition.Equal));
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Operand mask2 = context.AddIntrinsic(Intrinsic.X86Pand, opF, qMask);
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mask2 = context.AddIntrinsic(Intrinsic.X86Cmppd, mask2, qMask, Const((int)CmpCondition.Equal));
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qNaNMask = isQNaN == null || (bool)isQNaN ? context.AddIntrinsic(Intrinsic.X86Andpd, mask2, mask1) : default;
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qNaNMask = isQNaN == null || (bool)isQNaN ? context.AddIntrinsic(Intrinsic.X86Andpd, mask2, mask1) : default;
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sNaNMask = isQNaN == null || !(bool)isQNaN ? context.AddIntrinsic(Intrinsic.X86Andnpd, mask2, mask1) : default;
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}
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}
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@ -4895,11 +4897,11 @@ namespace ARMeilleure.Instructions
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Operand qMask = scalar ? X86GetScalar(context, 1 << QBit) : X86GetAllElements(context, 1 << QBit);
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Operand resNaNMask = context.AddIntrinsic(Intrinsic.X86Pandn, mSNaNMask, nQNaNMask);
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resNaNMask = context.AddIntrinsic(Intrinsic.X86Por, resNaNMask, nSNaNMask);
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Operand resNaNMask = context.AddIntrinsic(Intrinsic.X86Pandn, mSNaNMask, nQNaNMask);
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resNaNMask = context.AddIntrinsic(Intrinsic.X86Por, resNaNMask, nSNaNMask);
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Operand resNaN = context.AddIntrinsic(Intrinsic.X86Blendvps, mCopy, nCopy, resNaNMask);
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resNaN = context.AddIntrinsic(Intrinsic.X86Por, resNaN, qMask);
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resNaN = context.AddIntrinsic(Intrinsic.X86Por, resNaN, qMask);
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Operand resMask = context.AddIntrinsic(Intrinsic.X86Cmpps, nCopy, mCopy, Const((int)CmpCondition.OrderedQ));
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@ -4929,11 +4931,11 @@ namespace ARMeilleure.Instructions
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Operand qMask = scalar ? X86GetScalar(context, 1L << QBit) : X86GetAllElements(context, 1L << QBit);
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Operand resNaNMask = context.AddIntrinsic(Intrinsic.X86Pandn, mSNaNMask, nQNaNMask);
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resNaNMask = context.AddIntrinsic(Intrinsic.X86Por, resNaNMask, nSNaNMask);
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Operand resNaNMask = context.AddIntrinsic(Intrinsic.X86Pandn, mSNaNMask, nQNaNMask);
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resNaNMask = context.AddIntrinsic(Intrinsic.X86Por, resNaNMask, nSNaNMask);
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Operand resNaN = context.AddIntrinsic(Intrinsic.X86Blendvpd, mCopy, nCopy, resNaNMask);
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resNaN = context.AddIntrinsic(Intrinsic.X86Por, resNaN, qMask);
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resNaN = context.AddIntrinsic(Intrinsic.X86Por, resNaN, qMask);
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Operand resMask = context.AddIntrinsic(Intrinsic.X86Cmppd, nCopy, mCopy, Const((int)CmpCondition.OrderedQ));
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@ -4964,10 +4966,10 @@ namespace ARMeilleure.Instructions
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Operand mask = X86GetAllElements(context, -0f);
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Operand res = context.AddIntrinsic(isMax ? Intrinsic.X86Maxps : Intrinsic.X86Minps, n, m);
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res = context.AddIntrinsic(Intrinsic.X86Andnps, mask, res);
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res = context.AddIntrinsic(Intrinsic.X86Andnps, mask, res);
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Operand resSign = context.AddIntrinsic(isMax ? Intrinsic.X86Pand : Intrinsic.X86Por, n, m);
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resSign = context.AddIntrinsic(Intrinsic.X86Andps, mask, resSign);
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resSign = context.AddIntrinsic(Intrinsic.X86Andps, mask, resSign);
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return context.AddIntrinsic(Intrinsic.X86Por, res, resSign);
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}
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@ -4976,10 +4978,10 @@ namespace ARMeilleure.Instructions
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Operand mask = X86GetAllElements(context, -0d);
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Operand res = context.AddIntrinsic(isMax ? Intrinsic.X86Maxpd : Intrinsic.X86Minpd, n, m);
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res = context.AddIntrinsic(Intrinsic.X86Andnpd, mask, res);
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res = context.AddIntrinsic(Intrinsic.X86Andnpd, mask, res);
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Operand resSign = context.AddIntrinsic(isMax ? Intrinsic.X86Pand : Intrinsic.X86Por, n, m);
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resSign = context.AddIntrinsic(Intrinsic.X86Andpd, mask, resSign);
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resSign = context.AddIntrinsic(Intrinsic.X86Andpd, mask, resSign);
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return context.AddIntrinsic(Intrinsic.X86Por, res, resSign);
|
||||
}
|
||||
|
|
@ -5003,7 +5005,7 @@ namespace ARMeilleure.Instructions
|
|||
if (sizeF == 0)
|
||||
{
|
||||
Operand negInfMask = scalar
|
||||
? X86GetScalar (context, isMaxNum ? float.NegativeInfinity : float.PositiveInfinity)
|
||||
? X86GetScalar(context, isMaxNum ? float.NegativeInfinity : float.PositiveInfinity)
|
||||
: X86GetAllElements(context, isMaxNum ? float.NegativeInfinity : float.PositiveInfinity);
|
||||
|
||||
Operand nMask = context.AddIntrinsic(Intrinsic.X86Andnps, mQNaNMask, nQNaNMask);
|
||||
|
|
@ -5038,7 +5040,7 @@ namespace ARMeilleure.Instructions
|
|||
else /* if (sizeF == 1) */
|
||||
{
|
||||
Operand negInfMask = scalar
|
||||
? X86GetScalar (context, isMaxNum ? double.NegativeInfinity : double.PositiveInfinity)
|
||||
? X86GetScalar(context, isMaxNum ? double.NegativeInfinity : double.PositiveInfinity)
|
||||
: X86GetAllElements(context, isMaxNum ? double.NegativeInfinity : double.PositiveInfinity);
|
||||
|
||||
Operand nMask = context.AddIntrinsic(Intrinsic.X86Andnpd, mQNaNMask, nQNaNMask);
|
||||
|
|
@ -5072,7 +5074,7 @@ namespace ARMeilleure.Instructions
|
|||
{
|
||||
None,
|
||||
Add,
|
||||
Subtract
|
||||
Subtract,
|
||||
}
|
||||
|
||||
private static void EmitSse41VectorMul_AddSub(ArmEmitterContext context, AddSub addSub)
|
||||
|
|
@ -5187,10 +5189,10 @@ namespace ARMeilleure.Instructions
|
|||
|
||||
Intrinsic subInst = X86PsubInstruction[size];
|
||||
|
||||
Operand res = context.AddIntrinsic(subInst, n, m);
|
||||
Operand res = context.AddIntrinsic(subInst, n, m);
|
||||
Operand res2 = context.AddIntrinsic(subInst, m, n);
|
||||
|
||||
res = context.AddIntrinsic(Intrinsic.X86Pand, cmpMask, res);
|
||||
res = context.AddIntrinsic(Intrinsic.X86Pand, cmpMask, res);
|
||||
res2 = context.AddIntrinsic(Intrinsic.X86Pandn, cmpMask, res2);
|
||||
|
||||
res = context.AddIntrinsic(Intrinsic.X86Por, res, res2);
|
||||
|
|
@ -5214,7 +5216,7 @@ namespace ARMeilleure.Instructions
|
|||
}
|
||||
|
||||
Operand high = context.AddIntrinsic(Intrinsic.X86Pslldq, op, Const(8));
|
||||
high = context.AddIntrinsic(Intrinsic.X86Psrlq, high, Const(64 - shift));
|
||||
high = context.AddIntrinsic(Intrinsic.X86Psrlq, high, Const(64 - shift));
|
||||
|
||||
Operand low = context.AddIntrinsic(Intrinsic.X86Psllq, op, Const(shift));
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue